linux-arm-msm.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Greg KH <gregkh@linuxfoundation.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: hemantk@codeaurora.org, bbhatt@codeaurora.org,
	linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	loic.poulain@linaro.org, stable@vger.kernel.org
Subject: Re: [PATCH 7/8] bus: mhi: pci_generic: Apply no-op for wake using sideband wake boolean
Date: Thu, 24 Jun 2021 15:54:09 +0200	[thread overview]
Message-ID: <YNSOgSQ/K3Aavyjx@kroah.com> (raw)
In-Reply-To: <20210621161616.77524-8-manivannan.sadhasivam@linaro.org>

On Mon, Jun 21, 2021 at 09:46:15PM +0530, Manivannan Sadhasivam wrote:
> From: Bhaumik Bhatt <bbhatt@codeaurora.org>
> 
> Devices such as SDX24 do not have the provision for inband wake
> doorbell in the form of channel 127 and instead have a sideband
> GPIO for it. Newer devices such as SDX55 or SDX65 support inband
> wake method by default. Ensure the functionality is used based on
> this such that device wake stays held when a client driver uses
> mhi_device_get() API or the equivalent debugfs entry.
> 
> Cc: stable@vger.kernel.org
> Fixes: e3e5e6508fc1 ("bus: mhi: pci_generic: No-Op for device_wake operations")
> Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> Link: https://lore.kernel.org/r/1624053302-22470-1-git-send-email-bbhatt@codeaurora.org
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
>  drivers/bus/mhi/pci_generic.c | 27 +++++++++++++++++++--------
>  1 file changed, 19 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c
> index d84b74396c6a..eb9263bd1bd8 100644
> --- a/drivers/bus/mhi/pci_generic.c
> +++ b/drivers/bus/mhi/pci_generic.c
> @@ -32,6 +32,8 @@
>   * @edl: emergency download mode firmware path (if any)
>   * @bar_num: PCI base address register to use for MHI MMIO register space
>   * @dma_data_width: DMA transfer word size (32 or 64 bits)
> + * @sideband_wake: Devices using dedicated sideband GPIO for wakeup instead
> + *                 of inband wake support (such as sdx24)
>   */
>  struct mhi_pci_dev_info {
>  	const struct mhi_controller_config *config;
> @@ -40,6 +42,7 @@ struct mhi_pci_dev_info {
>  	const char *edl;
>  	unsigned int bar_num;
>  	unsigned int dma_data_width;
> +	bool sideband_wake;
>  };
>  
>  #define MHI_CHANNEL_CONFIG_UL(ch_num, ch_name, el_count, ev_ring) \
> @@ -242,7 +245,8 @@ static const struct mhi_pci_dev_info mhi_qcom_sdx65_info = {
>  	.edl = "qcom/sdx65m/edl.mbn",
>  	.config = &modem_qcom_v1_mhiv_config,
>  	.bar_num = MHI_PCI_DEFAULT_BAR_NUM,
> -	.dma_data_width = 32
> +	.dma_data_width = 32,
> +	.sideband_wake = false

Please put a trailing , here and for the other definitions, so in the
future you will not have to modify the previous line, like you had to do
here.

thanks,

greg k-h

  reply	other threads:[~2021-06-24 13:54 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-21 16:16 [PATCH 0/8] MHI patches for v5.14 Manivannan Sadhasivam
2021-06-21 16:16 ` [PATCH 1/8] bus: mhi: core: Validate channel ID when processing command completions Manivannan Sadhasivam
2021-06-24 13:50   ` Greg KH
2021-06-24 14:32     ` Manivannan Sadhasivam
2021-06-24 14:39       ` Greg KH
2021-06-24 14:47         ` Manivannan Sadhasivam
2021-06-24 15:27           ` Greg KH
2021-06-24 15:56             ` Manivannan Sadhasivam
2021-06-21 16:16 ` [PATCH 2/8] bus: mhi: core: Fix power down latency Manivannan Sadhasivam
2021-06-21 16:16 ` [PATCH 3/8] bus: mhi: Wait for M2 state during system resume Manivannan Sadhasivam
2021-06-21 16:16 ` [PATCH 4/8] bus: mhi: Add inbound buffers allocation flag Manivannan Sadhasivam
2021-06-24 13:51   ` Greg KH
2021-06-24 15:39     ` Loic Poulain
2021-06-24 16:48       ` Greg KH
2021-06-24 19:01         ` Loic Poulain
2021-06-21 16:16 ` [PATCH 5/8] bus: mhi: pci-generic: Add missing 'pci_disable_pcie_error_reporting()' calls Manivannan Sadhasivam
2021-06-21 16:16 ` [PATCH 6/8] bus: mhi: core: Add support for processing priority of event ring Manivannan Sadhasivam
2021-06-24 13:53   ` Greg KH
2021-06-24 14:24     ` Manivannan Sadhasivam
2021-06-24 14:40       ` Greg KH
2021-06-24 14:50         ` Manivannan Sadhasivam
2021-06-21 16:16 ` [PATCH 7/8] bus: mhi: pci_generic: Apply no-op for wake using sideband wake boolean Manivannan Sadhasivam
2021-06-24 13:54   ` Greg KH [this message]
2021-06-21 16:16 ` [PATCH 8/8] bus: mhi: pci_generic: Add Cinterion MV31-W PCIe to MHI Manivannan Sadhasivam
2021-06-24 13:54   ` Greg KH
2021-06-24 13:54 ` [PATCH 0/8] MHI patches for v5.14 Greg KH
2021-06-24 14:20   ` Manivannan Sadhasivam

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=YNSOgSQ/K3Aavyjx@kroah.com \
    --to=gregkh@linuxfoundation.org \
    --cc=bbhatt@codeaurora.org \
    --cc=hemantk@codeaurora.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=loic.poulain@linaro.org \
    --cc=manivannan.sadhasivam@linaro.org \
    --cc=stable@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).