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From: Vinod Koul <vkoul@kernel.org>
To: Doug Anderson <dianders@chromium.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>,
	Mark Brown <broonie@kernel.org>, Wolfram Sang <wsa@kernel.org>,
	Andy Gross <agross@kernel.org>,
	Sumit Semwal <sumit.semwal@linaro.org>,
	Matthias Kaehlcke <mka@chromium.org>,
	linux-spi <linux-spi@vger.kernel.org>,
	linux-i2c <linux-i2c@vger.kernel.org>,
	linux-arm-msm <linux-arm-msm@vger.kernel.org>,
	LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 2/5] soc: qcom: geni: Add support for gpi dma
Date: Tue, 29 Jun 2021 09:07:36 +0530	[thread overview]
Message-ID: <YNqVgESqehz27knL@matsya> (raw)
In-Reply-To: <CAD=FV=ULVo=vz2Vww6_bcfrhosy0GRC2oVEcXt6zw8n4C2MiuQ@mail.gmail.com>

Hi Doug,

On 28-06-21, 16:38, Doug Anderson wrote:
> Hi,
> 
> On Thu, Jun 24, 2021 at 10:22 PM Vinod Koul <vkoul@kernel.org> wrote:
> >
> > +static void geni_se_select_gpi_mode(struct geni_se *se)
> > +{
> > +       u32 val;
> > +
> > +       geni_se_irq_clear(se);
> > +
> > +       writel(0, se->base + SE_IRQ_EN);
> > +
> > +       val = readl(se->base + SE_GENI_S_IRQ_EN);
> > +       val &= ~S_CMD_DONE_EN;
> > +       writel(val, se->base + SE_GENI_S_IRQ_EN);
> > +
> > +       val = readl(se->base + SE_GENI_M_IRQ_EN);
> > +       val &= ~(M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN |
> > +                M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN);
> > +       writel(val, se->base + SE_GENI_M_IRQ_EN);
> > +
> > +       writel(GENI_DMA_MODE_EN, se->base + SE_GENI_DMA_MODE_EN);
> > +
> > +       val = readl(se->base + SE_GSI_EVENT_EN);
> > +       val |= (DMA_RX_EVENT_EN | DMA_TX_EVENT_EN | GENI_M_EVENT_EN | GENI_S_EVENT_EN);
> 
> nit: the above has some extra parenthesis that aren't needed.
> 
> I will continue to assert that all of the "set mode" stuff doesn't
> really belong here and should be managed by individual drivers [1].
> I'll accept that it doesn't have to block forward progress, though I'm
> at least a bit disappointed that we asked Qualcomm to do this over 8
> months ago and no action was taken. :(
> 
> In any case, this looks OK to me:
> 
> Reviewed-by: Douglas Anderson <dianders@chromium.org>

Thanks for the review.

> 
> [1] https://lore.kernel.org/r/CAD=FV=VWPqswOXJejyXjYT_Yspdu75ELq42cffN87FrpTwPUQg@mail.gmail.com/

I agree we should do something, will discuss with Bjorn and try to help
here.

Regards
-- 
~Vinod

  reply	other threads:[~2021-06-29  3:37 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-25  5:22 [PATCH v3 0/5] Add and enable GPI DMA users Vinod Koul
2021-06-25  5:22 ` [PATCH v3 1/5] soc: qcom: geni: move GENI_IF_DISABLE_RO to common header Vinod Koul
2021-06-28 23:37   ` Doug Anderson
2021-06-25  5:22 ` [PATCH v3 2/5] soc: qcom: geni: Add support for gpi dma Vinod Koul
2021-06-28 23:38   ` Doug Anderson
2021-06-29  3:37     ` Vinod Koul [this message]
2021-06-25  5:22 ` [PATCH v3 3/5] spi: core: add dma_map_dev for dma device Vinod Koul
2021-06-25  5:22 ` [PATCH v3 4/5] spi: spi-geni-qcom: Add support for GPI dma Vinod Koul
2021-06-28 23:37   ` Doug Anderson
2021-10-14 16:04     ` Vinod Koul
2021-10-14 16:55       ` Doug Anderson
2021-10-18 16:53         ` Vinod Koul
2021-06-25  5:22 ` [PATCH v3 5/5] i2c: qcom-geni: Add support for GPI DMA Vinod Koul
2021-06-25 13:24 ` (subset) [PATCH v3 0/5] Add and enable GPI DMA users Mark Brown

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