From: Daniel Vetter <daniel@ffwll.ch>
To: Rob Clark <robdclark@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
DRI Development <dri-devel@lists.freedesktop.org>,
Intel Graphics Development <intel-gfx@lists.freedesktop.org>,
Lucas Stach <l.stach@pengutronix.de>,
Daniel Vetter <daniel.vetter@intel.com>,
Sean Paul <sean@poorly.run>,
linux-arm-msm <linux-arm-msm@vger.kernel.org>,
freedreno <freedreno@lists.freedesktop.org>
Subject: Re: [PATCH v5 16/20] drm/msm: Don't break exclusive fence ordering
Date: Mon, 30 Aug 2021 11:02:42 +0200 [thread overview]
Message-ID: <YSyesupzftTAuWqI@phenom.ffwll.local> (raw)
In-Reply-To: <CAF6AEGtSM_TfCKvHh48WFX4DvhdrWLLi3oCMPz1x2_pCZwbPCQ@mail.gmail.com>
On Thu, Aug 26, 2021 at 09:16:25AM -0700, Rob Clark wrote:
> On Thu, Aug 5, 2021 at 3:47 AM Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> >
> > There's only one exclusive slot, and we must not break the ordering.
> >
> > Adding a new exclusive fence drops all previous fences from the
> > dma_resv. To avoid violating the signalling order we err on the side of
> > over-synchronizing by waiting for the existing fences, even if
> > userspace asked us to ignore them.
> >
> > A better fix would be to us a dma_fence_chain or _array like e.g.
> > amdgpu now uses, but
> > - msm has a synchronous dma_fence_wait for anything from another
> > context, so doesn't seem to care much,
> > - and it probably makes sense to lift this into dma-resv.c code as a
> > proper concept, so that drivers don't have to hack up their own
> > solution each on their own.
> >
> > v2: Improve commit message per Lucas' suggestion.
> >
> > Cc: Lucas Stach <l.stach@pengutronix.de>
> > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
> > Cc: Rob Clark <robdclark@gmail.com>
> > Cc: Sean Paul <sean@poorly.run>
> > Cc: linux-arm-msm@vger.kernel.org
> > Cc: freedreno@lists.freedesktop.org
>
> a-b
Also pushed to drm-misc-next, thanks for review&testing.
-Daniel
>
> > ---
> > drivers/gpu/drm/msm/msm_gem_submit.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c b/drivers/gpu/drm/msm/msm_gem_submit.c
> > index fb5a2eab27a2..66633dfd58a2 100644
> > --- a/drivers/gpu/drm/msm/msm_gem_submit.c
> > +++ b/drivers/gpu/drm/msm/msm_gem_submit.c
> > @@ -330,7 +330,8 @@ static int submit_fence_sync(struct msm_gem_submit *submit, bool no_implicit)
> > return ret;
> > }
> >
> > - if (no_implicit)
> > + /* exclusive fences must be ordered */
> > + if (no_implicit && !write)
> > continue;
> >
> > ret = drm_sched_job_add_implicit_dependencies(&submit->base,
> > --
> > 2.32.0
> >
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
prev parent reply other threads:[~2021-08-30 9:02 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20210805104705.862416-1-daniel.vetter@ffwll.ch>
2021-08-05 10:46 ` [PATCH v5 01/20] drm/sched: Split drm_sched_job_init Daniel Vetter
2021-08-05 13:43 ` Christian König
2021-08-05 14:07 ` Daniel Vetter
2021-08-05 14:47 ` Christian König
2021-08-05 15:07 ` Daniel Vetter
2021-08-17 8:49 ` [PATCH] " Daniel Vetter
2021-08-05 10:46 ` [PATCH v5 02/20] drm/msm: Fix drm/sched point of no return rules Daniel Vetter
2021-08-05 23:02 ` Rob Clark
2021-08-06 16:41 ` Daniel Vetter
2021-08-06 17:19 ` Rob Clark
2021-08-06 18:41 ` Daniel Vetter
2021-08-06 19:01 ` Rob Clark
2021-08-06 19:10 ` Daniel Vetter
2021-08-06 19:59 ` Rob Clark
2021-08-17 8:53 ` [PATCH] drm/msm: Improve " Daniel Vetter
2021-08-26 9:33 ` Daniel Vetter
2021-08-26 15:38 ` Rob Clark
2021-08-05 10:46 ` [PATCH v5 05/20] drm/sched: drop entity parameter from drm_sched_push_job Daniel Vetter
2021-08-05 13:48 ` Christian König
2021-08-05 10:46 ` [PATCH v5 12/20] drm/msm: Use scheduler dependency handling Daniel Vetter
2021-08-12 19:29 ` Daniel Vetter
2021-08-26 16:12 ` Rob Clark
2021-08-30 9:01 ` Daniel Vetter
2021-08-05 10:47 ` [PATCH v5 16/20] drm/msm: Don't break exclusive fence ordering Daniel Vetter
2021-08-26 16:16 ` Rob Clark
2021-08-30 9:02 ` Daniel Vetter [this message]
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