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charset=utf-8 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Thu, Sep 09, 2021 at 10:14:18AM +0530, rajpat@codeaurora.org wrote: > On 2021-09-03 22:52, Matthias Kaehlcke wrote: > > On Fri, Sep 03, 2021 at 09:58:59AM +0530, Rajesh Patil wrote: > > > From: Roja Rani Yarubandi > > > > > > Add QUPv3 wrapper_1 DT nodes for SC7280 SoC. > > > > > > Signed-off-by: Roja Rani Yarubandi > > > Signed-off-by: Rajesh Patil > > > --- > > > arch/arm64/boot/dts/qcom/sc7280.dtsi | 709 > > > +++++++++++++++++++++++++++++++++++ > > > 1 file changed, 709 insertions(+) > > > > > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi > > > b/arch/arm64/boot/dts/qcom/sc7280.dtsi > > > index 32d1354..8fe54bf 100644 > > > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > > > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > > > > > + qup_spi8_data_clk: qup-spi8-data-clk { > > > + pins = "gpio32", "gpio33", "gpio34"; > > > + function = "qup10"; > > > + }; > > > + > > > + qup_spi8_cs: qup-spi8-cs { > > > + pins = "gpio35"; > > > + function = "qup10"; > > > + }; > > > > As for wrapper_0, I think we still want the nodes to configure the CS as > > GPIO. > > > > If there are no other reasons to re-spin these could be added with a > > follow-up > > patch, so: > > > shall we add all removed qup_spiN_cs_gpio nodes? Yes