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[97.77.166.58]) by smtp.gmail.com with ESMTPSA id q36sm17361oiw.35.2021.09.15.06.53.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Sep 2021 06:53:38 -0700 (PDT) Date: Wed, 15 Sep 2021 08:53:35 -0500 From: Bjorn Andersson To: Felipe Balbi Cc: Bryan O'Donoghue , Heikki Krogerus , Peter Chen , Rob Herring , agross@kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, wcheng@codeaurora.org, linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov Subject: Re: [PATCH 0/3] Implement role-switch notifications from dwc3-drd to dwc3-qcom Message-ID: References: <20210707015704.GA28125@nchen> <20210708030631.GA22420@nchen> <87zgt65avm.fsf@kernel.org> <90d17c95-1cf3-89aa-94ad-920e4781f866@linaro.org> <87ilzsafu5.fsf@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <87ilzsafu5.fsf@kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Thu 26 Aug 01:15 CDT 2021, Felipe Balbi wrote: > > Hi, > > Bjorn Andersson writes: > > On Wed 25 Aug 10:59 PDT 2021, Bryan O'Donoghue wrote: > > > >> On 25/08/2021 16:53, Bjorn Andersson wrote: > >> > But in the case of Type-C altmode several of our boards have either an > >> > external gpio-based SBU-pin-swapper or some redriver on I2C with this > >> > functionality, so we need a way to tell both the PHY and this external > >> > contraption about the orientation. > >> > >> Its a very similar problem to orientation switch > >> > >> As an example > >> > >> - redriver may need to fix up signal integrity for > >> lane switching > >> > >> - PHY needs to toggle lanes from one IP block to another > >> > > > > Right, conceptually the problem is similar, but IMHO there's a big > > difference in that the redriver and PHY are two physically separate > > entities - on different buses. The dwc3 glue and core represent the same > > piece of hardware. > > no they don't. The glue is a real piece of HW that adapts the "generic" > synopsys IP to a given SoC. OMAP, for example, was adapting Synopsys' > proprietary interface to the Sonics interconnect, while some others may > adapt it to AXI or PCI or whatever. > > They are different HW blocks, the glue (in many cases) has its own IRQ, > its own address space, its own register file, and so on. Granted, the > glue also serves as an access port from CPU to the synopsys core, but > that's handled by `ranges' DT property. > So what you're saying is that the "Qualcomm glue" is the hardware, and the core is just the basis for that design? Regardless, on the Qualcomm platforms we have need to inform both devices about role changes, how do we do this? (Without platform_data and preferably without having to duplicate the typec code in the glue and core and the two device nodes in DT) Regards, Bjorn