From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 312ADC433F5 for ; Fri, 13 May 2022 08:58:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378712AbiEMI6p (ORCPT ); Fri, 13 May 2022 04:58:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53176 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1378574AbiEMI6o (ORCPT ); Fri, 13 May 2022 04:58:44 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BED732B24D7; Fri, 13 May 2022 01:58:43 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 4821E62171; Fri, 13 May 2022 08:58:43 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 997CAC34100; Fri, 13 May 2022 08:58:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1652432322; bh=y5hNXUrGNvO6cEunrd+P8GV2IaK4KDe9YPvw8H7DMF8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=g+QV87M3tdWV5smAyn+8sRCKFz9jK2E+B97C/kP1V0wK4E5fLM053u2uRdcgZ70v2 IfcXyJ6B7hjiDMG2ejbI/gcY5CjS+O01EnGcm+ly7bao1pcN6uB6NTNGI7gWJeGDkZ 98WfcXiKiofN7G43igJGQopjGZfHburt+hIWLnC27bWNkSKIfwJX6UFW8XoW9yu1/o GYgOc1ITjNo1Sosn93qmSU4CMRoocQQGuQ8ebAIajGj+dTkdMtyAxteqKMzC8jBgcf 3Cwqw+5uGlhQQoSqZjmLR3le+kxlpRc+1Z/2dTXj62/sgxc3gjHk/9r0tKjf+4JiFq D9JxQeSr15QLg== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1npR8A-0007U9-8a; Fri, 13 May 2022 10:58:39 +0200 Date: Fri, 13 May 2022 10:58:38 +0200 From: Johan Hovold To: Dmitry Baryshkov Cc: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Jingoo Han , Gustavo Pimentel , Lorenzo Pieralisi , Bjorn Helgaas , Stanimir Varbanov , Manivannan Sadhasivam , Vinod Koul , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v8 00/10] PCI: qcom: Fix higher MSI vectors handling Message-ID: References: <20220512104545.2204523-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220512104545.2204523-1-dmitry.baryshkov@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Thu, May 12, 2022 at 01:45:35PM +0300, Dmitry Baryshkov wrote: > I have replied with my Tested-by to the patch at [2], which has landed > in the linux-next as the commit 20f1bfb8dd62 ("PCI: qcom: > Add support for handling MSIs from 8 endpoints"). However lately I > noticed that during the tests I still had 'pcie_pme=nomsi', so the > device was not forced to use higher MSI vectors. > > After removing this option I noticed that hight MSI vectors are not > delivered on tested platforms. After additional research I stumbled upon > a patch in msm-4.14 ([1]), which describes that each group of MSI > vectors is mapped to the separate interrupt. Implement corresponding > mapping. > > The first patch in the series is a revert of [2] (landed in pci-next). > Either both patches should be applied or both should be dropped. > > Patchseries dependecies: [3] (for the schema change). > > Changes since v7: > - Move code back to the dwc core driver (as required by Rob), > - Change dt schema to require either a single "msi" interrupt or an > array of "msi0", "msi1", ... "msi7" IRQs. Disallow specifying a > part of the array (the DT should specify the exact amount of MSI IRQs > allowing fallback to a single "msi" IRQ), Why this new constraint? I've been using your v7 with an sc8280xp which only has four IRQs (and hence 128 MSIs). Looks like this version of the series would not allow that anymore. Johan