From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CAF24C433EF for ; Thu, 7 Jul 2022 07:39:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235101AbiGGHjD (ORCPT ); Thu, 7 Jul 2022 03:39:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55180 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234758AbiGGHip (ORCPT ); Thu, 7 Jul 2022 03:38:45 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C0B1E326F2; Thu, 7 Jul 2022 00:38:36 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 5CDDC61B0C; Thu, 7 Jul 2022 07:38:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B2C07C3411E; Thu, 7 Jul 2022 07:38:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1657179515; bh=dEH00sPee+QPLnv4vCT0+HRB/HiN2iqpU4CrPolA87A=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=pr3afQObb2yiXatw9whVzqKy3t1SWArA7c5qdephf6Eu2In0y9jjAc7uJkyHaTtRQ RizEOEFsIZ8ZfYclMF/ClpnGUxwRm+FlHbZmOGit74tSA003KaUDCOvUAkd3O7XGi+ RsUVglrGvjxr/xQcv5WoRFoPH58lxw9lFfmKQ97XAb5XKWTooPHvbV6K9nE3Izel7v RnY5El1xSJSDLX6wvLHo0J4wwvFkigGOqHNRrh7mGyxcsLjW7ODwbxoWtWeDX6wzIB tFdHv3k1nKrVDxr3vbskQvBXU11LmmL1A9HeiVBPQxHPuuksR9/L7VlVtWl/b9RdLz NIikfJJ7HAgvQ== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1o9M5s-0004XB-V3; Thu, 07 Jul 2022 09:38:37 +0200 Date: Thu, 7 Jul 2022 09:38:36 +0200 From: Johan Hovold To: Dmitry Baryshkov Cc: Andy Gross , Bjorn Andersson , Vinod Koul , Kishon Vijay Abraham I , Stephen Boyd , Michael Turquette , Taniya Das , Philipp Zabel , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-clk@vger.kernel.org Subject: Re: [PATCH 2/2] phy: qcom-qmp-ufs: provide symbol clocks Message-ID: References: <20220620153956.1723269-1-dmitry.baryshkov@linaro.org> <20220620153956.1723269-2-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220620153956.1723269-2-dmitry.baryshkov@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Mon, Jun 20, 2022 at 06:39:56PM +0300, Dmitry Baryshkov wrote: > Register three UFS symbol clocks (ufs_rx_symbol_0_clk_src, > ufs_rx_symbol_1_clk_src ufs_tx_symbol_0_clk_src). Register OF clock > provider to let other devices link these clocks through the DT. > > Signed-off-by: Dmitry Baryshkov > --- > drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 55 +++++++++++++++++++++++++ > 1 file changed, 55 insertions(+) > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c > index a2526068232b..0f31d3255897 100644 > --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c > @@ -1167,6 +1167,54 @@ static int qcom_qmp_phy_ufs_clk_init(struct device *dev, const struct qmp_phy_cf > return devm_clk_bulk_get(dev, num, qmp->clks); > } > > +static void phy_clk_release_provider(void *res) > +{ > + of_clk_del_provider(res); > +} > + > +#define UFS_SYMBOL_CLOCKS 3 > + > +static int phy_symbols_clk_register(struct qcom_qmp *qmp, struct device_node *np) > +{ > + struct clk_hw_onecell_data *clk_data; > + struct clk_hw *hw; > + int ret; > + > + clk_data = devm_kzalloc(qmp->dev, struct_size(clk_data, hws, UFS_SYMBOL_CLOCKS), GFP_KERNEL); Missing error handling. > + clk_data->num = UFS_SYMBOL_CLOCKS; > + > + hw = devm_clk_hw_register_fixed_rate(qmp->dev, "ufs_rx_symbol_0_clk_src", Don't the clock names need to be globally unique and hence either come from the devicetree or encode the device topology some other way? We have two UFS PHYs on sc8280xp for example. > + NULL, 0, 0); > + if (IS_ERR(hw)) > + return PTR_ERR(hw); > + > + clk_data->hws[0] = hw; > + > + hw = devm_clk_hw_register_fixed_rate(qmp->dev, "ufs_rx_symbol_1_clk_src", > + NULL, 0, 0); > + if (IS_ERR(hw)) > + return PTR_ERR(hw); > + > + clk_data->hws[1] = hw; > + > + hw = devm_clk_hw_register_fixed_rate(qmp->dev, "ufs_tx_symbol_0_clk_src", > + NULL, 0, 0); > + if (IS_ERR(hw)) > + return PTR_ERR(hw); > + > + clk_data->hws[2] = hw; > + > + ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data); > + if (ret) > + return ret; > + > + /* > + * Roll a devm action because the clock provider is the child node, but > + * the child node is not actually a device. > + */ > + return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np); > +} Johan