From: Hans Verkuil <hverkuil@xs4all.nl>
To: Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org,
robert.foss@linaro.org, jonathan@marek.ca
Cc: andrey.konovalov@linaro.org, todor.too@gmail.com,
agross@kernel.org, bjorn.andersson@linaro.org,
mchehab@kernel.org, jgrahsl@snap.com, hfink@snap.com
Subject: Re: [PATCH v2 01/19] media: dt-bindings: media: camss: Add qcom,sm8250-camss binding
Date: Thu, 2 Dec 2021 14:06:52 +0100 [thread overview]
Message-ID: <a1c7a29d-115c-881f-4f00-fe502365242e@xs4all.nl> (raw)
In-Reply-To: <20211124175921.1048375-2-bryan.odonoghue@linaro.org>
Hi Bryan,
This patch needs to be CC-ed to devicetree@vger.kernel.org. I need an Acked-by from
the device tree maintainers before I can merge this series.
Everything else looks good, it's the only thing preventing this from merging.
Regards,
Hans
On 24/11/2021 18:59, Bryan O'Donoghue wrote:
> From: Jonathan Marek <jonathan@marek.ca>
>
> Add bindings for qcom,sm8250-camss in order to support the camera
> subsystem for SM8250.
>
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
> ---
> .../bindings/media/qcom,sm8250-camss.yaml | 450 ++++++++++++++++++
> 1 file changed, 450 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml
>
> diff --git a/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml
> new file mode 100644
> index 000000000000..af877d61b607
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml
> @@ -0,0 +1,450 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/media/qcom,sm8250-camss.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Qualcomm CAMSS ISP
> +
> +maintainers:
> + - Robert Foss <robert.foss@linaro.org>
> +
> +description: |
> + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms.
> +
> +properties:
> + compatible:
> + const: qcom,sm8250-camss
> +
> + clocks:
> + minItems: 37
> + maxItems: 37
> +
> + clock-names:
> + items:
> + - const: cam_ahb_clk
> + - const: cam_hf_axi
> + - const: cam_sf_axi
> + - const: camnoc_axi
> + - const: camnoc_axi_src
> + - const: core_ahb
> + - const: cpas_ahb
> + - const: csiphy0
> + - const: csiphy0_timer
> + - const: csiphy1
> + - const: csiphy1_timer
> + - const: csiphy2
> + - const: csiphy2_timer
> + - const: csiphy3
> + - const: csiphy3_timer
> + - const: csiphy4
> + - const: csiphy4_timer
> + - const: csiphy5
> + - const: csiphy5_timer
> + - const: slow_ahb_src
> + - const: vfe0_ahb
> + - const: vfe0_axi
> + - const: vfe0
> + - const: vfe0_cphy_rx
> + - const: vfe0_csid
> + - const: vfe0_areg
> + - const: vfe1_ahb
> + - const: vfe1_axi
> + - const: vfe1
> + - const: vfe1_cphy_rx
> + - const: vfe1_csid
> + - const: vfe1_areg
> + - const: vfe_lite_ahb
> + - const: vfe_lite_axi
> + - const: vfe_lite
> + - const: vfe_lite_cphy_rx
> + - const: vfe_lite_csid
> +
> + interrupts:
> + minItems: 14
> + maxItems: 14
> +
> + interrupt-names:
> + items:
> + - const: csiphy0
> + - const: csiphy1
> + - const: csiphy2
> + - const: csiphy3
> + - const: csiphy4
> + - const: csiphy5
> + - const: csid0
> + - const: csid1
> + - const: csid2
> + - const: csid3
> + - const: vfe0
> + - const: vfe1
> + - const: vfe_lite0
> + - const: vfe_lite1
> +
> + iommus:
> + minItems: 8
> + maxItems: 8
> +
> + interconnects:
> + minItems: 4
> + maxItems: 4
> +
> + interconnect-names:
> + items:
> + - const: cam_ahb
> + - const: cam_hf_0_mnoc
> + - const: cam_sf_0_mnoc
> + - const: cam_sf_icp_mnoc
> +
> + power-domains:
> + items:
> + - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller.
> + - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller.
> + - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller.
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + description:
> + CSI input ports.
> +
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description:
> + Input port for receiving CSI data.
> +
> + properties:
> + endpoint:
> + $ref: video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + clock-lanes:
> + maxItems: 1
> +
> + data-lanes:
> + minItems: 1
> + maxItems: 4
> +
> + required:
> + - clock-lanes
> + - data-lanes
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description:
> + Input port for receiving CSI data.
> +
> + properties:
> + endpoint:
> + $ref: video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + clock-lanes:
> + maxItems: 1
> +
> + data-lanes:
> + minItems: 1
> + maxItems: 4
> +
> + required:
> + - clock-lanes
> + - data-lanes
> +
> + port@2:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description:
> + Input port for receiving CSI data.
> +
> + properties:
> + endpoint:
> + $ref: video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + clock-lanes:
> + maxItems: 1
> +
> + data-lanes:
> + minItems: 1
> + maxItems: 4
> +
> + required:
> + - clock-lanes
> + - data-lanes
> +
> + port@3:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description:
> + Input port for receiving CSI data.
> +
> + properties:
> + endpoint:
> + $ref: video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + clock-lanes:
> + maxItems: 1
> +
> + data-lanes:
> + minItems: 1
> + maxItems: 4
> +
> + required:
> + - clock-lanes
> + - data-lanes
> +
> + port@4:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description:
> + Input port for receiving CSI data.
> +
> + properties:
> + endpoint:
> + $ref: video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + clock-lanes:
> + maxItems: 1
> +
> + data-lanes:
> + minItems: 1
> + maxItems: 4
> +
> + required:
> + - clock-lanes
> + - data-lanes
> +
> + port@5:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description:
> + Input port for receiving CSI data.
> +
> + properties:
> + endpoint:
> + $ref: video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + clock-lanes:
> + maxItems: 1
> +
> + data-lanes:
> + minItems: 1
> + maxItems: 4
> +
> + required:
> + - clock-lanes
> + - data-lanes
> +
> + reg:
> + minItems: 10
> + maxItems: 10
> +
> + reg-names:
> + items:
> + - const: csiphy0
> + - const: csiphy1
> + - const: csiphy2
> + - const: csiphy3
> + - const: csiphy4
> + - const: csiphy5
> + - const: vfe0
> + - const: vfe1
> + - const: vfe_lite0
> + - const: vfe_lite1
> +
> +required:
> + - clock-names
> + - clocks
> + - compatible
> + - interconnects
> + - interconnect-names
> + - interrupts
> + - interrupt-names
> + - iommus
> + - power-domains
> + - reg
> + - reg-names
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/clock/qcom,camcc-sm8250.h>
> + #include <dt-bindings/interconnect/qcom,sm8250.h>
> + #include <dt-bindings/clock/qcom,gcc-sm8250.h>
> + #include <dt-bindings/power/qcom-rpmpd.h>
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + camss: camss@ac6a000 {
> + compatible = "qcom,sm8250-camss";
> +
> + reg = <0 0xac6a000 0 0x2000>,
> + <0 0xac6c000 0 0x2000>,
> + <0 0xac6e000 0 0x1000>,
> + <0 0xac70000 0 0x1000>,
> + <0 0xac72000 0 0x1000>,
> + <0 0xac74000 0 0x1000>,
> + <0 0xacb4000 0 0xd000>,
> + <0 0xacc3000 0 0xd000>,
> + <0 0xacd9000 0 0x2200>,
> + <0 0xacdb200 0 0x2200>;
> + reg-names = "csiphy0",
> + "csiphy1",
> + "csiphy2",
> + "csiphy3",
> + "csiphy4",
> + "csiphy5",
> + "vfe0",
> + "vfe1",
> + "vfe_lite0",
> + "vfe_lite1";
> +
> + interrupts = <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "csiphy0",
> + "csiphy1",
> + "csiphy2",
> + "csiphy3",
> + "csiphy4",
> + "csiphy5",
> + "csid0",
> + "csid1",
> + "csid2",
> + "csid3",
> + "vfe0",
> + "vfe1",
> + "vfe_lite0",
> + "vfe_lite1";
> +
> + power-domains = <&camcc IFE_0_GDSC>,
> + <&camcc IFE_1_GDSC>,
> + <&camcc TITAN_TOP_GDSC>;
> +
> + clocks = <&gcc GCC_CAMERA_AHB_CLK>,
> + <&gcc GCC_CAMERA_HF_AXI_CLK>,
> + <&gcc GCC_CAMERA_SF_AXI_CLK>,
> + <&camcc CAM_CC_CAMNOC_AXI_CLK>,
> + <&camcc CAM_CC_CAMNOC_AXI_CLK_SRC>,
> + <&camcc CAM_CC_CORE_AHB_CLK>,
> + <&camcc CAM_CC_CPAS_AHB_CLK>,
> + <&camcc CAM_CC_CSIPHY0_CLK>,
> + <&camcc CAM_CC_CSI0PHYTIMER_CLK>,
> + <&camcc CAM_CC_CSIPHY1_CLK>,
> + <&camcc CAM_CC_CSI1PHYTIMER_CLK>,
> + <&camcc CAM_CC_CSIPHY2_CLK>,
> + <&camcc CAM_CC_CSI2PHYTIMER_CLK>,
> + <&camcc CAM_CC_CSIPHY3_CLK>,
> + <&camcc CAM_CC_CSI3PHYTIMER_CLK>,
> + <&camcc CAM_CC_CSIPHY4_CLK>,
> + <&camcc CAM_CC_CSI4PHYTIMER_CLK>,
> + <&camcc CAM_CC_CSIPHY5_CLK>,
> + <&camcc CAM_CC_CSI5PHYTIMER_CLK>,
> + <&camcc CAM_CC_SLOW_AHB_CLK_SRC>,
> + <&camcc CAM_CC_IFE_0_AHB_CLK>,
> + <&camcc CAM_CC_IFE_0_AXI_CLK>,
> + <&camcc CAM_CC_IFE_0_CLK>,
> + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
> + <&camcc CAM_CC_IFE_0_CSID_CLK>,
> + <&camcc CAM_CC_IFE_0_AREG_CLK>,
> + <&camcc CAM_CC_IFE_1_AHB_CLK>,
> + <&camcc CAM_CC_IFE_1_AXI_CLK>,
> + <&camcc CAM_CC_IFE_1_CLK>,
> + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>,
> + <&camcc CAM_CC_IFE_1_CSID_CLK>,
> + <&camcc CAM_CC_IFE_1_AREG_CLK>,
> + <&camcc CAM_CC_IFE_LITE_AHB_CLK>,
> + <&camcc CAM_CC_IFE_LITE_AXI_CLK>,
> + <&camcc CAM_CC_IFE_LITE_CLK>,
> + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
> + <&camcc CAM_CC_IFE_LITE_CSID_CLK>;
> + clock-names = "cam_ahb_clk",
> + "cam_hf_axi",
> + "cam_sf_axi",
> + "camnoc_axi",
> + "camnoc_axi_src",
> + "core_ahb",
> + "cpas_ahb",
> + "csiphy0",
> + "csiphy0_timer",
> + "csiphy1",
> + "csiphy1_timer",
> + "csiphy2",
> + "csiphy2_timer",
> + "csiphy3",
> + "csiphy3_timer",
> + "csiphy4",
> + "csiphy4_timer",
> + "csiphy5",
> + "csiphy5_timer",
> + "slow_ahb_src",
> + "vfe0_ahb",
> + "vfe0_axi",
> + "vfe0",
> + "vfe0_cphy_rx",
> + "vfe0_csid",
> + "vfe0_areg",
> + "vfe1_ahb",
> + "vfe1_axi",
> + "vfe1",
> + "vfe1_cphy_rx",
> + "vfe1_csid",
> + "vfe1_areg",
> + "vfe_lite_ahb",
> + "vfe_lite_axi",
> + "vfe_lite",
> + "vfe_lite_cphy_rx",
> + "vfe_lite_csid";
> +
> + iommus = <&apps_smmu 0x800 0x400>,
> + <&apps_smmu 0x801 0x400>,
> + <&apps_smmu 0x840 0x400>,
> + <&apps_smmu 0x841 0x400>,
> + <&apps_smmu 0xC00 0x400>,
> + <&apps_smmu 0xC01 0x400>,
> + <&apps_smmu 0xC40 0x400>,
> + <&apps_smmu 0xC41 0x400>;
> +
> + interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_CAMERA_CFG>,
> + <&mmss_noc MASTER_CAMNOC_HF &mc_virt SLAVE_EBI_CH0>,
> + <&mmss_noc MASTER_CAMNOC_SF &mc_virt SLAVE_EBI_CH0>,
> + <&mmss_noc MASTER_CAMNOC_ICP &mc_virt SLAVE_EBI_CH0>;
> + interconnect-names = "cam_ahb",
> + "cam_hf_0_mnoc",
> + "cam_sf_0_mnoc",
> + "cam_sf_icp_mnoc";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> + };
>
next prev parent reply other threads:[~2021-12-02 13:18 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-24 17:59 [PATCH v2 00/19] CAMSS: Add SM8250 support Bryan O'Donoghue
2021-11-24 17:59 ` [PATCH v2 01/19] media: dt-bindings: media: camss: Add qcom,sm8250-camss binding Bryan O'Donoghue
2021-12-02 13:06 ` Hans Verkuil [this message]
2021-12-02 13:11 ` Bryan O'Donoghue
2021-11-24 17:59 ` [PATCH v2 02/19] media: camss: csiphy-3ph: don't print HW version as an error Bryan O'Donoghue
2021-11-24 17:59 ` [PATCH v2 03/19] media: camss: csiphy-3ph: disable interrupts Bryan O'Donoghue
2021-11-24 17:59 ` [PATCH v2 04/19] media: camss: csiphy-3ph: add support for SM8250 CSI DPHY Bryan O'Donoghue
2021-11-24 17:59 ` [PATCH v2 05/19] media: camss: csid-170: fix non-10bit formats Bryan O'Donoghue
2021-11-24 17:59 ` [PATCH v2 06/19] media: camss: csid-170: don't enable unused irqs Bryan O'Donoghue
2021-11-24 17:59 ` [PATCH v2 07/19] media: camss: csid-170: remove stray comment Bryan O'Donoghue
2021-11-24 17:59 ` [PATCH v2 08/19] media: camss: csid-170: support more than one lite vfe Bryan O'Donoghue
2021-11-24 17:59 ` [PATCH v2 09/19] media: camss: csid-170: set the right HALT_CMD when disabled Bryan O'Donoghue
2021-11-24 17:59 ` [PATCH v2 10/19] media: camss: csid: allow csid to work without a regulator Bryan O'Donoghue
2021-11-24 17:59 ` [PATCH v2 11/19] media: camss: remove vdda-csiN from sdm845 resources Bryan O'Donoghue
2021-11-24 17:59 ` [PATCH v2 12/19] media: camss: fix VFE irq name Bryan O'Donoghue
2021-11-24 17:59 ` [PATCH v2 13/19] media: camss: vfe-170: fix "VFE halt timeout" error Bryan O'Donoghue
2021-11-24 17:59 ` [PATCH v2 14/19] media: camss: Add initial support for VFE hardware version Titan 480 Bryan O'Donoghue
2021-11-24 17:59 ` [PATCH v2 15/19] media: camss: add support for V4L2_PIX_FMT_GREY for sdm845 HW Bryan O'Donoghue
2021-11-24 17:59 ` [PATCH v2 16/19] media: camss: add support for SM8250 camss Bryan O'Donoghue
2021-11-24 17:59 ` [PATCH v2 17/19] media: camss: Add SM8250 bandwdith configuration support Bryan O'Donoghue
2021-11-25 10:27 ` Robert Foss
2021-11-24 17:59 ` [PATCH v2 18/19] media: camss: Do vfe_get/vfe_put for csid on sm8250 Bryan O'Donoghue
2021-11-25 10:43 ` Robert Foss
2021-11-24 17:59 ` [PATCH v2 19/19] media: camss: Apply vfe_get/vfe_put fix to SDM845 Bryan O'Donoghue
2021-11-25 10:45 ` Robert Foss
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