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[92.233.226.227]) by smtp.googlemail.com with ESMTPSA id x10sm5665619wrt.26.2021.06.07.07.50.12 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 07 Jun 2021 07:50:13 -0700 (PDT) Subject: Re: [PATCH v2] ASoC: qcom: Fix for DMA interrupt clear reg overwriting To: Srinivasa Rao Mandadapu , agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, plai@codeaurora.org, bgoswami@codeaurora.org, perex@perex.cz, tiwai@suse.com, rohitkr@codeaurora.org, linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, swboyd@chromium.org, judyhsiao@chromium.org References: <20210605113809.26584-1-srivasam@codeaurora.org> From: Srinivas Kandagatla Message-ID: Date: Mon, 7 Jun 2021 15:50:12 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <20210605113809.26584-1-srivasam@codeaurora.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 05/06/2021 12:38, Srinivasa Rao Mandadapu wrote: > The DMA interrupt clear register overwritten during > simultaneous playback and capture in lpass platform > interrupt handler. It's causing playback or capture stuck > in similtaneous plaback on speaker and capture on dmic test. > Update appropriate reg fields of corresponding channel instead > of entire register write. > > Fixes: commit c5c8635a04711 ("ASoC: qcom: Add LPASS platform driver") > > Signed-off-by: Srinivasa Rao Mandadapu > --- > sound/soc/qcom/lpass-platform.c | 17 +++++++++++------ > 1 file changed, 11 insertions(+), 6 deletions(-) > > diff --git a/sound/soc/qcom/lpass-platform.c b/sound/soc/qcom/lpass-platform.c > index 0df9481ea4c6..f220a2739ac3 100644 > --- a/sound/soc/qcom/lpass-platform.c > +++ b/sound/soc/qcom/lpass-platform.c > @@ -526,7 +526,7 @@ static int lpass_platform_pcmops_trigger(struct snd_soc_component *component, > return -EINVAL; > } > > - ret = regmap_write(map, reg_irqclr, val_irqclr); > + ret = regmap_update_bits(map, reg_irqclr, val_irqclr, val_irqclr); > if (ret) { > dev_err(soc_runtime->dev, "error writing to irqclear reg: %d\n", ret); > return ret; > @@ -650,7 +650,7 @@ static irqreturn_t lpass_dma_interrupt_handler( > struct lpass_variant *v = drvdata->variant; > irqreturn_t ret = IRQ_NONE; > int rv; > - unsigned int reg = 0, val = 0; > + unsigned int reg, val, val_clr, val_mask; minor nit here, variable name val_clr is pretty confusing to readers, It might be okay for irq clr register but we are using the same name of writing to other registers. So can I suggest you to reuse val variable. other thing is val_mask, please rename this to mask and just set it in the start of function so you can avoid 3 extra lines below. Other than that patch looks good to me! --srini > struct regmap *map; > unsigned int dai_id = cpu_dai->driver->id; > > @@ -676,8 +676,9 @@ static irqreturn_t lpass_dma_interrupt_handler( > return -EINVAL; > } > if (interrupts & LPAIF_IRQ_PER(chan)) { > - > - rv = regmap_write(map, reg, LPAIF_IRQ_PER(chan) | val); > + val_clr = LPAIF_IRQ_PER(chan) | val; > + val_mask = LPAIF_IRQ_ALL(chan); > + rv = regmap_update_bits(map, reg, val_mask, val_clr); > if (rv) { > dev_err(soc_runtime->dev, > "error writing to irqclear reg: %d\n", rv); > @@ -688,7 +689,9 @@ static irqreturn_t lpass_dma_interrupt_handler( > } > > if (interrupts & LPAIF_IRQ_XRUN(chan)) { > - rv = regmap_write(map, reg, LPAIF_IRQ_XRUN(chan) | val); > + val_clr = (LPAIF_IRQ_XRUN(chan) | val); > + val_mask = LPAIF_IRQ_ALL(chan); > + rv = regmap_update_bits(map, reg, val_mask, val_clr); > if (rv) { > dev_err(soc_runtime->dev, > "error writing to irqclear reg: %d\n", rv); > @@ -700,7 +703,9 @@ static irqreturn_t lpass_dma_interrupt_handler( > } > > if (interrupts & LPAIF_IRQ_ERR(chan)) { > - rv = regmap_write(map, reg, LPAIF_IRQ_ERR(chan) | val); > + val_clr = (LPAIF_IRQ_ERR(chan) | val); > + val_mask = LPAIF_IRQ_ALL(chan); > + rv = regmap_update_bits(map, reg, val_mask, val_clr); > if (rv) { > dev_err(soc_runtime->dev, > "error writing to irqclear reg: %d\n", rv); >