Linux-ARM-MSM Archive on lore.kernel.org
 help / color / Atom feed
From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: Stephen Boyd <swboyd@chromium.org>
Cc: Marc Zyngier <maz@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	rnayak@codeaurora.org, suzuki.poulose@arm.com,
	catalin.marinas@arm.com,
	linux-arm-kernel <linux-arm-kernel-bounces@lists.infradead.org>,
	linux-kernel@vger.kernel.org, jeremy.linton@arm.com,
	bjorn.andersson@linaro.org, linux-arm-msm@vger.kernel.org,
	andrew.murray@arm.com, will@kernel.org, Dave.Martin@arm.com,
	linux-arm-kernel@lists.infradead.org, marc.w.gonzalez@free.fr,
	linux-arm-msm-owner@vger.kernel.org
Subject: Re: Relax CPU features sanity checking on heterogeneous architectures
Date: Fri, 18 Oct 2019 15:48:43 +0530
Message-ID: <c8491f4b91058ef018fb5b3b9ff457cd@codeaurora.org> (raw)
In-Reply-To: <5da8c868.1c69fb81.ae709.97ff@mx.google.com>

On 2019-10-18 01:30, Stephen Boyd wrote:
> Quoting Sai Prakash Ranjan (2019-10-11 06:40:13)
>> On 2019-10-11 19:04, Marc Zyngier wrote:
>> > On Fri, 11 Oct 2019 18:47:39 +0530
>> > Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> wrote:
>> >
>> >> Hi Mark,
>> >>
>> >> Thanks a lot for the detailed explanations, I did have a look at all
>> >> the variations before posting this.
>> >>
>> >> On 2019-10-11 16:20, Mark Rutland wrote:
>> >> > Hi,
>> >> >
>> >> > On Fri, Oct 11, 2019 at 11:19:00AM +0530, Sai Prakash Ranjan wrote:
>> >> >> On latest QCOM SoCs like SM8150 and SC7180 with big.LITTLE arch, below
>> >> >> warnings are observed during bootup of big cpu cores.
>> >> >
>> >> > For reference, which CPUs are in those SoCs?
>> >> >
>> >>
>> >> SM8150 is based on Cortex-A55(little cores) and Cortex-A76(big cores).
>> >> I'm afraid I cannot give details about SC7180 yet.
>> >>
>> >> >> SM8150:
>> >> >> >> [    0.271177] CPU features: SANITY CHECK: Unexpected variation in
>> >> >> SYS_ID_AA64PFR0_EL1. Boot CPU: 0x00000011112222, CPU4: >> 0x00000011111112
>> >> >
>> >> > The differing fields are EL3, EL2, and EL1: the boot CPU supports
>> >> > AArch64 and AArch32 at those exception levels, while the secondary only
>> >> > supports AArch64.
>> >> >
>> >> > Do we handle this variation in KVM?
>> >>
>> >> We do not support KVM.
>> >
>> > Mainline does. You don't get to pick and choose what is supported or
>> > not.
>> >
>> 
>> Ok thats good.
>> 
> 
> I want KVM on sc7180. How do I get it? Is something going to not work?

I meant KVM is not supported for downstream android case where we do not 
have kernel booting from EL2.
And obviously I am wrong because SC7180 is not for android, so my bad.
I think Mark R's question about handling KVM variation was for Marc Z 
not me :p

As for something not going to work, as Mark said this warning does 
indicate that 32 bit EL1 guests won't
be able to run on big CPU cores.

- Sai

  parent reply index

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-11  5:49 Sai Prakash Ranjan
2019-10-11  9:19 ` Marc Gonzalez
2019-10-11  9:57   ` Sai Prakash Ranjan
2019-10-11 10:50 ` Mark Rutland
2019-10-11 11:09   ` Marc Gonzalez
2019-10-11 13:33     ` Sai Prakash Ranjan
2019-10-11 13:17   ` Sai Prakash Ranjan
2019-10-11 13:34     ` Marc Zyngier
2019-10-11 13:40       ` Sai Prakash Ranjan
2019-10-17 20:00         ` Stephen Boyd
2019-10-18  7:20           ` Marc Zyngier
2019-10-18 14:33             ` Stephen Boyd
2019-10-18 16:40               ` Marc Zyngier
2019-10-18 10:18           ` Sai Prakash Ranjan [this message]
2019-10-11 13:33   ` Marc Zyngier
2019-10-11 13:54     ` Mark Rutland
2019-10-11 14:06       ` Marc Zyngier
2019-10-17 21:39       ` Jeremy Linton
2019-10-18  9:01         ` Catalin Marinas

Reply instructions:

You may reply publically to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=c8491f4b91058ef018fb5b3b9ff457cd@codeaurora.org \
    --to=saiprakash.ranjan@codeaurora.org \
    --cc=Dave.Martin@arm.com \
    --cc=andrew.murray@arm.com \
    --cc=bjorn.andersson@linaro.org \
    --cc=catalin.marinas@arm.com \
    --cc=jeremy.linton@arm.com \
    --cc=linux-arm-kernel-bounces@lists.infradead.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-arm-msm-owner@vger.kernel.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=marc.w.gonzalez@free.fr \
    --cc=mark.rutland@arm.com \
    --cc=maz@kernel.org \
    --cc=rnayak@codeaurora.org \
    --cc=suzuki.poulose@arm.com \
    --cc=swboyd@chromium.org \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

Linux-ARM-MSM Archive on lore.kernel.org

Archives are clonable:
	git clone --mirror https://lore.kernel.org/linux-arm-msm/0 linux-arm-msm/git/0.git

	# If you have public-inbox 1.1+ installed, you may
	# initialize and index your mirror using the following commands:
	public-inbox-init -V2 linux-arm-msm linux-arm-msm/ https://lore.kernel.org/linux-arm-msm \
		linux-arm-msm@vger.kernel.org
	public-inbox-index linux-arm-msm

Example config snippet for mirrors

Newsgroup available over NNTP:
	nntp://nntp.lore.kernel.org/org.kernel.vger.linux-arm-msm


AGPL code for this site: git clone https://public-inbox.org/public-inbox.git