From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A037C433F5 for ; Fri, 7 Oct 2022 19:40:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229957AbiJGTj6 (ORCPT ); Fri, 7 Oct 2022 15:39:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35088 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230252AbiJGTjs (ORCPT ); Fri, 7 Oct 2022 15:39:48 -0400 Received: from m-r1.th.seeweb.it (m-r1.th.seeweb.it [IPv6:2001:4b7a:2000:18::170]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7CF45FD6 for ; Fri, 7 Oct 2022 12:39:37 -0700 (PDT) Received: from [192.168.1.101] (95.49.30.201.neoplus.adsl.tpnet.pl [95.49.30.201]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id 3BFA01F8F4; Fri, 7 Oct 2022 21:39:35 +0200 (CEST) Message-ID: Date: Fri, 7 Oct 2022 21:39:34 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 Subject: Re: [PATCH 2/4] arm64: dts: qcom: sdm630: correct I2C8 pin functions Content-Language: en-US To: Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Linus Walleij , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20221006104104.171368-1-krzysztof.kozlowski@linaro.org> <20221006104104.171368-2-krzysztof.kozlowski@linaro.org> From: Konrad Dybcio In-Reply-To: <20221006104104.171368-2-krzysztof.kozlowski@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 6.10.2022 12:41, Krzysztof Kozlowski wrote: > The I2C8 pins are split into i2c8_a (GPIO30 and GPIO31) and i2c8_b > (GPIO44 and GPIO52). Correct the name of function for I2C8 pins. > > Signed-off-by: Krzysztof Kozlowski > --- Reviewed-by: Konrad Dybcio Konrad > arch/arm64/boot/dts/qcom/sdm630.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi > index bc7c341e793c..796c19b9b2eb 100644 > --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi > @@ -885,14 +885,14 @@ i2c7_sleep: i2c7-sleep { > > i2c8_default: i2c8-default { > pins = "gpio30", "gpio31"; > - function = "blsp_i2c8"; > + function = "blsp_i2c8_a"; > drive-strength = <2>; > bias-disable; > }; > > i2c8_sleep: i2c8-sleep { > pins = "gpio30", "gpio31"; > - function = "blsp_i2c8"; > + function = "blsp_i2c8_a"; > drive-strength = <2>; > bias-pull-up; > };