From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: Mathieu Poirier <mathieu.poirier@linaro.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Leo Yan <leo.yan@linaro.org>, Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Andy Gross <andy.gross@linaro.org>,
David Brown <david.brown@linaro.org>,
Mark Rutland <mark.rutland@arm.com>
Cc: Rajendra Nayak <rnayak@codeaurora.org>,
Vivek Gautam <vivek.gautam@codeaurora.org>,
Sibi Sankar <sibis@codeaurora.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Subject: [PATCHv3 0/1] coresight: Do not default to CPU0 for missing CPU phandle
Date: Mon, 24 Jun 2019 09:06:08 +0530 [thread overview]
Message-ID: <cover.1561346998.git.saiprakash.ranjan@codeaurora.org> (raw)
In case of missing CPU phandle, the affinity is set default to
CPU0 which is not a correct assumption. Fix this in coresight
platform to set affinity to invalid and abort the probe in drivers.
Also update the dt-bindings accordingly.
v3:
* Addressed review comments from Suzuki and updated
acpi_coresight_get_cpu.
* Removed patch 2 which had invalid check for online
cpus.
v2:
* Addressed review comments from Suzuki and Mathieu.
* Allows the probe of etm and cpu-debug to abort earlier
in case of unavailability of respective cpus.
Sai Prakash Ranjan (1):
coresight: Do not default to CPU0 for missing CPU phandle
.../bindings/arm/coresight-cpu-debug.txt | 4 ++--
.../devicetree/bindings/arm/coresight.txt | 8 +++++---
.../hwtracing/coresight/coresight-cpu-debug.c | 3 +++
drivers/hwtracing/coresight/coresight-etm3x.c | 3 +++
drivers/hwtracing/coresight/coresight-etm4x.c | 3 +++
drivers/hwtracing/coresight/coresight-platform.c | 16 ++++++++--------
6 files changed, 24 insertions(+), 13 deletions(-)
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
next reply other threads:[~2019-06-24 3:36 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-24 3:36 Sai Prakash Ranjan [this message]
2019-06-24 3:36 ` [PATCHv3 1/1] coresight: Do not default to CPU0 for missing CPU phandle Sai Prakash Ranjan
2019-06-24 8:26 ` Suzuki K Poulose
2019-06-24 9:27 ` Sai Prakash Ranjan
2019-06-26 17:41 ` Mathieu Poirier
2019-06-26 19:02 ` Sai Prakash Ranjan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=cover.1561346998.git.saiprakash.ranjan@codeaurora.org \
--to=saiprakash.ranjan@codeaurora.org \
--cc=alexander.shishkin@linux.intel.com \
--cc=andy.gross@linaro.org \
--cc=david.brown@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=leo.yan@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=mathieu.poirier@linaro.org \
--cc=rnayak@codeaurora.org \
--cc=robh+dt@kernel.org \
--cc=sibis@codeaurora.org \
--cc=suzuki.poulose@arm.com \
--cc=vivek.gautam@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).