From: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
To: Will Deacon <will@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Arnd Bergmann <arnd@arndb.de>,
Steven Rostedt <rostedt@goodmis.org>,
"Marc Zyngier" <maz@kernel.org>
Cc: gregkh <gregkh@linuxfoundation.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-arm-msm@vger.kernel.org>, <quic_psodagud@quicinc.com>,
Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Subject: [PATCHv5 2/4] irqchip/tegra: Fix overflow implicit truncation warnings
Date: Mon, 6 Dec 2021 13:58:04 +0530 [thread overview]
Message-ID: <d578f7a68d6f9c250e5305e677c1b732c94f7ec6.1638275062.git.quic_saipraka@quicinc.com> (raw)
In-Reply-To: <cover.1638275062.git.quic_saipraka@quicinc.com>
Fix -Woverflow warnings for tegra irqchip driver which is a result
of moving arm64 custom MMIO accessor macros to asm-generic function
implementations giving a bonus type-checking now and uncovering these
overflow warnings.
drivers/irqchip/irq-tegra.c: In function ‘tegra_ictlr_suspend’:
drivers/irqchip/irq-tegra.c:151:18: warning: large integer implicitly truncated to unsigned type [-Woverflow]
writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR);
^
Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
---
drivers/irqchip/irq-tegra.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/irqchip/irq-tegra.c b/drivers/irqchip/irq-tegra.c
index e1f771c72fc4..9e4e5b39c701 100644
--- a/drivers/irqchip/irq-tegra.c
+++ b/drivers/irqchip/irq-tegra.c
@@ -148,10 +148,10 @@ static int tegra_ictlr_suspend(void)
lic->cop_iep[i] = readl_relaxed(ictlr + ICTLR_COP_IEP_CLASS);
/* Disable COP interrupts */
- writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR);
+ writel_relaxed(~0u, ictlr + ICTLR_COP_IER_CLR);
/* Disable CPU interrupts */
- writel_relaxed(~0ul, ictlr + ICTLR_CPU_IER_CLR);
+ writel_relaxed(~0u, ictlr + ICTLR_CPU_IER_CLR);
/* Enable the wakeup sources of ictlr */
writel_relaxed(lic->ictlr_wake_mask[i], ictlr + ICTLR_CPU_IER_SET);
@@ -172,12 +172,12 @@ static void tegra_ictlr_resume(void)
writel_relaxed(lic->cpu_iep[i],
ictlr + ICTLR_CPU_IEP_CLASS);
- writel_relaxed(~0ul, ictlr + ICTLR_CPU_IER_CLR);
+ writel_relaxed(~0u, ictlr + ICTLR_CPU_IER_CLR);
writel_relaxed(lic->cpu_ier[i],
ictlr + ICTLR_CPU_IER_SET);
writel_relaxed(lic->cop_iep[i],
ictlr + ICTLR_COP_IEP_CLASS);
- writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR);
+ writel_relaxed(~0u, ictlr + ICTLR_COP_IER_CLR);
writel_relaxed(lic->cop_ier[i],
ictlr + ICTLR_COP_IER_SET);
}
@@ -312,7 +312,7 @@ static int __init tegra_ictlr_init(struct device_node *node,
lic->base[i] = base;
/* Disable all interrupts */
- writel_relaxed(~0UL, base + ICTLR_CPU_IER_CLR);
+ writel_relaxed(~0U, base + ICTLR_CPU_IER_CLR);
/* All interrupts target IRQ */
writel_relaxed(0, base + ICTLR_CPU_IEP_CLASS);
--
2.33.1
next prev parent reply other threads:[~2021-12-06 8:29 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-06 8:28 [PATCHv5 0/4] tracing/rwmmio/arm64: Add support to trace register reads/writes Sai Prakash Ranjan
2021-12-06 8:28 ` [PATCHv5 1/4] arm64: io: Use asm-generic high level MMIO accessors Sai Prakash Ranjan
2021-12-06 8:50 ` Arnd Bergmann
2021-12-06 11:12 ` Sai Prakash Ranjan
2021-12-06 11:30 ` Arnd Bergmann
2021-12-06 13:52 ` Sai Prakash Ranjan
2021-12-06 15:15 ` Arnd Bergmann
2021-12-06 15:57 ` Sai Prakash Ranjan
2021-12-06 15:36 ` kernel test robot
2021-12-07 13:04 ` kernel test robot
2021-12-06 8:28 ` Sai Prakash Ranjan [this message]
2021-12-06 8:51 ` [PATCHv5 2/4] irqchip/tegra: Fix overflow implicit truncation warnings Arnd Bergmann
2021-12-06 8:28 ` [PATCHv5 3/4] tracing: Add register read/write tracing support Sai Prakash Ranjan
2021-12-06 8:59 ` Arnd Bergmann
2021-12-06 10:11 ` Sai Prakash Ranjan
2021-12-06 10:46 ` Arnd Bergmann
2021-12-06 10:52 ` Sai Prakash Ranjan
2021-12-06 10:13 ` Sai Prakash Ranjan
2021-12-06 11:52 ` kernel test robot
2021-12-06 16:39 ` kernel test robot
2021-12-06 8:28 ` [PATCHv5 4/4] asm-generic/io: Add logging support for MMIO accessors Sai Prakash Ranjan
2021-12-06 9:09 ` Arnd Bergmann
2021-12-06 9:52 ` Sai Prakash Ranjan
2021-12-06 10:01 ` Arnd Bergmann
2021-12-06 10:20 ` Sai Prakash Ranjan
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