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* [PATCH v3 1/3] phy:  add driver for Qualcomm IPQ40xx USB PHY
@ 2020-01-27 21:23 Robert Marko
  2020-01-27 21:23 ` [PATCH v3 2/3] dt-bindings: phy-qcom-ipq4019-usb: add binding document Robert Marko
                   ` (4 more replies)
  0 siblings, 5 replies; 10+ messages in thread
From: Robert Marko @ 2020-01-27 21:23 UTC (permalink / raw)
  To: john, agross, linux-arm-msm; +Cc: Robert Marko, Luka Perkov

From: John Crispin <john@phrozen.org>

Add a driver to setup the USB phy on Qualcom Dakota SoCs.
The driver sets up HS and SS phys.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
---
Changes from v2 to v3:
* Remove magic writes as they are not needed
* Correct commit message

 drivers/phy/qualcomm/Kconfig                |   7 +
 drivers/phy/qualcomm/Makefile               |   1 +
 drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c | 152 ++++++++++++++++++++
 3 files changed, 160 insertions(+)
 create mode 100644 drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c

diff --git a/drivers/phy/qualcomm/Kconfig b/drivers/phy/qualcomm/Kconfig
index e46824da29f6..964bd5d784d2 100644
--- a/drivers/phy/qualcomm/Kconfig
+++ b/drivers/phy/qualcomm/Kconfig
@@ -18,6 +18,13 @@ config PHY_QCOM_APQ8064_SATA
 	depends on OF
 	select GENERIC_PHY
 
+config PHY_QCOM_IPQ4019_USB
+	tristate "Qualcomm IPQ4019 USB PHY module"
+	depends on OF && ARCH_QCOM
+	select GENERIC_PHY
+	help
+	  Support for the USB PHY on QCOM IPQ4019/Dakota chipsets.
+
 config PHY_QCOM_IPQ806X_SATA
 	tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
 	depends on ARCH_QCOM
diff --git a/drivers/phy/qualcomm/Makefile b/drivers/phy/qualcomm/Makefile
index 283251d6a5d9..8afe6c4f5178 100644
--- a/drivers/phy/qualcomm/Makefile
+++ b/drivers/phy/qualcomm/Makefile
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 obj-$(CONFIG_PHY_ATH79_USB)		+= phy-ath79-usb.o
 obj-$(CONFIG_PHY_QCOM_APQ8064_SATA)	+= phy-qcom-apq8064-sata.o
+obj-$(CONFIG_PHY_QCOM_IPQ4019_USB)	+= phy-qcom-ipq4019-usb.o
 obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA)	+= phy-qcom-ipq806x-sata.o
 obj-$(CONFIG_PHY_QCOM_PCIE2)		+= phy-qcom-pcie2.o
 obj-$(CONFIG_PHY_QCOM_QMP)		+= phy-qcom-qmp.o
diff --git a/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c b/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
new file mode 100644
index 000000000000..7efebae6b6fd
--- /dev/null
+++ b/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2018 John Crispin <john@phrozen.org>
+ *
+ * Based on code from
+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
+ *
+ */
+
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/of_platform.h>
+#include <linux/phy/phy.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
+
+struct ipq4019_usb_phy {
+	struct device		*dev;
+	struct phy		*phy;
+	void __iomem		*base;
+	struct reset_control	*por_rst;
+	struct reset_control	*srif_rst;
+};
+
+static int ipq4019_ss_phy_power_off(struct phy *_phy)
+{
+	struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
+
+	reset_control_assert(phy->por_rst);
+	msleep(10);
+
+	return 0;
+}
+
+static int ipq4019_ss_phy_power_on(struct phy *_phy)
+{
+	struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
+
+	ipq4019_ss_phy_power_off(_phy);
+
+	reset_control_deassert(phy->por_rst);
+
+	return 0;
+}
+
+static struct phy_ops ipq4019_usb_ss_phy_ops = {
+	.power_on	= ipq4019_ss_phy_power_on,
+	.power_off	= ipq4019_ss_phy_power_off,
+};
+
+static int ipq4019_hs_phy_power_off(struct phy *_phy)
+{
+	struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
+
+	reset_control_assert(phy->por_rst);
+	msleep(10);
+
+	reset_control_assert(phy->srif_rst);
+	msleep(10);
+
+	return 0;
+}
+
+static int ipq4019_hs_phy_power_on(struct phy *_phy)
+{
+	struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
+
+	ipq4019_hs_phy_power_off(_phy);
+
+	reset_control_deassert(phy->srif_rst);
+	msleep(10);
+
+	reset_control_deassert(phy->por_rst);
+
+	return 0;
+}
+
+static struct phy_ops ipq4019_usb_hs_phy_ops = {
+	.power_on	= ipq4019_hs_phy_power_on,
+	.power_off	= ipq4019_hs_phy_power_off,
+};
+
+static const struct of_device_id ipq4019_usb_phy_of_match[] = {
+	{ .compatible = "qcom,usb-hs-ipq4019-phy", .data = &ipq4019_usb_hs_phy_ops},
+	{ .compatible = "qcom,usb-ss-ipq4019-phy", .data = &ipq4019_usb_ss_phy_ops},
+	{ },
+};
+MODULE_DEVICE_TABLE(of, ipq4019_usb_phy_of_match);
+
+static int ipq4019_usb_phy_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct resource *res;
+	struct phy_provider *phy_provider;
+	struct ipq4019_usb_phy *phy;
+	const struct of_device_id *match;
+
+	match = of_match_device(ipq4019_usb_phy_of_match, &pdev->dev);
+	if (!match)
+		return -ENODEV;
+
+	phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
+	if (!phy)
+		return -ENOMEM;
+
+	phy->dev = &pdev->dev;
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	phy->base = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(phy->base)) {
+		dev_err(dev, "failed to remap register memory\n");
+		return PTR_ERR(phy->base);
+	}
+
+	phy->por_rst = devm_reset_control_get(phy->dev, "por_rst");
+	if (IS_ERR(phy->por_rst)) {
+		if (PTR_ERR(phy->por_rst) != -EPROBE_DEFER)
+			dev_err(dev, "POR reset is missing\n");
+		return PTR_ERR(phy->por_rst);
+	}
+
+	phy->srif_rst = devm_reset_control_get_optional(phy->dev, "srif_rst");
+	if (IS_ERR(phy->srif_rst))
+		return PTR_ERR(phy->srif_rst);
+
+	phy->phy = devm_phy_create(dev, NULL, match->data);
+	if (IS_ERR(phy->phy)) {
+		dev_err(dev, "failed to create PHY\n");
+		return PTR_ERR(phy->phy);
+	}
+	phy_set_drvdata(phy->phy, phy);
+
+	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
+
+	return PTR_ERR_OR_ZERO(phy_provider);
+}
+
+static struct platform_driver ipq4019_usb_phy_driver = {
+	.probe	= ipq4019_usb_phy_probe,
+	.driver = {
+		.of_match_table	= ipq4019_usb_phy_of_match,
+		.name  = "ipq4019-usb-phy",
+	}
+};
+module_platform_driver(ipq4019_usb_phy_driver);
+
+MODULE_DESCRIPTION("QCOM/IPQ4019 USB phy driver");
+MODULE_AUTHOR("John Crispin <john@phrozen.org>");
+MODULE_LICENSE("GPL v2");
-- 
2.24.1


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v3 2/3] dt-bindings: phy-qcom-ipq4019-usb: add binding document
  2020-01-27 21:23 [PATCH v3 1/3] phy: add driver for Qualcomm IPQ40xx USB PHY Robert Marko
@ 2020-01-27 21:23 ` Robert Marko
  2020-01-27 21:23 ` [PATCH v3 3/3] ARM: dts: qcom: ipq4019: add USB devicetree nodes Robert Marko
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 10+ messages in thread
From: Robert Marko @ 2020-01-27 21:23 UTC (permalink / raw)
  To: john, agross, linux-arm-msm; +Cc: Robert Marko, Luka Perkov

This patch adds the binding documentation for the HS/SS USB PHY found
inside Qualcom Dakota SoCs.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
---
 .../bindings/phy/qcom-usb-ipq4019-phy.yaml    | 45 +++++++++++++++++++
 1 file changed, 45 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml b/Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml
new file mode 100644
index 000000000000..6473731b07a1
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml
@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/phy/qcom-usb-ipq4019-phy.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Qualcom IPQ40xx Dakota HS/SS USB PHY
+
+properties:
+  compatible:
+    enum:
+      - qcom,usb-ss-ipq4019-phy
+      - qcom,usb-hs-ipq4019-phy
+
+  reg:
+    maxItems: 1
+
+  resets:
+    maxItems: 2
+
+  reset-names:
+    items:
+      - const: por_rst
+      - const: srif_rst
+
+  "#phy-cells":
+    const: 0
+
+required:
+  - compatible
+  - reg
+  - resets
+  - reset-names
+  - "#phy-cells"
+
+examples:
+  - |
+    hsphy@a8000 {
+	   compatible = "qcom,usb-hs-ipq4019-phy";
+	   phy-cells = <0>;
+	   reg = <0xa8000 0x40>;
+	   resets = <&gcc USB2_HSPHY_POR_ARES>,
+		   <&gcc USB2_HSPHY_S_ARES>;
+	   reset-names = "por_rst", "srif_rst";
+    };
-- 
2.24.1


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v3 3/3] ARM: dts: qcom: ipq4019: add USB devicetree nodes
  2020-01-27 21:23 [PATCH v3 1/3] phy: add driver for Qualcomm IPQ40xx USB PHY Robert Marko
  2020-01-27 21:23 ` [PATCH v3 2/3] dt-bindings: phy-qcom-ipq4019-usb: add binding document Robert Marko
@ 2020-01-27 21:23 ` Robert Marko
  2020-03-27 22:12   ` Bjorn Andersson
  2020-03-08 18:55 ` [PATCH v3 1/3] phy: add driver for Qualcomm IPQ40xx USB PHY Robert Marko
                   ` (2 subsequent siblings)
  4 siblings, 1 reply; 10+ messages in thread
From: Robert Marko @ 2020-01-27 21:23 UTC (permalink / raw)
  To: john, agross, linux-arm-msm; +Cc: Robert Marko, Luka Perkov

From: John Crispin <john@phrozen.org>

Since we now have driver for the USB PHY, lets add the necessary nodes to DTSI.

Signed-off-by: John Crispin <john@phrozen.org>
Tested-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
---
 arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 20 +++++
 arch/arm/boot/dts/qcom-ipq4019.dtsi           | 74 +++++++++++++++++++
 2 files changed, 94 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
index 418f9a022336..2ee5f05d5a43 100644
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -109,5 +109,25 @@
 		wifi@a800000 {
 			status = "ok";
 		};
+
+		usb3_ss_phy: ssphy@9a000 {
+			status = "ok";
+		};
+
+		usb3_hs_phy: hsphy@a6000 {
+			status = "ok";
+		};
+
+		usb3: usb3@8af8800 {
+			status = "ok";
+		};
+
+		usb2_hs_phy: hsphy@a8000 {
+			status = "ok";
+		};
+
+		usb2: usb2@60f8800 {
+			status = "ok";
+		};
 	};
 };
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index b6e5203a210b..18e9c639514c 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -564,5 +564,79 @@
 					  "legacy";
 			status = "disabled";
 		};
+
+		usb3_ss_phy: ssphy@9a000 {
+			compatible = "qcom,usb-ss-ipq4019-phy";
+			#phy-cells = <0>;
+			reg = <0x9a000 0x800>;
+			reg-names = "phy_base";
+			resets = <&gcc USB3_UNIPHY_PHY_ARES>;
+			reset-names = "por_rst";
+			status = "disabled";
+		};
+
+		usb3_hs_phy: hsphy@a6000 {
+			compatible = "qcom,usb-hs-ipq4019-phy";
+			#phy-cells = <0>;
+			reg = <0xa6000 0x40>;
+			reg-names = "phy_base";
+			resets = <&gcc USB3_HSPHY_POR_ARES>, <&gcc USB3_HSPHY_S_ARES>;
+			reset-names = "por_rst", "srif_rst";
+			status = "disabled";
+		};
+
+		usb3@8af8800 {
+			compatible = "qcom,dwc3";
+			reg = <0x8af8800 0x100>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			clocks = <&gcc GCC_USB3_MASTER_CLK>,
+				 <&gcc GCC_USB3_SLEEP_CLK>,
+				 <&gcc GCC_USB3_MOCK_UTMI_CLK>;
+			clock-names = "master", "sleep", "mock_utmi";
+			ranges;
+			status = "disabled";
+
+			dwc3@8a00000 {
+				compatible = "snps,dwc3";
+				reg = <0x8a00000 0xf8000>;
+				interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
+				phys = <&usb3_hs_phy>, <&usb3_ss_phy>;
+				phy-names = "usb2-phy", "usb3-phy";
+				dr_mode = "host";
+			};
+		};
+
+		usb2_hs_phy: hsphy@a8000 {
+			compatible = "qcom,usb-hs-ipq4019-phy";
+			#phy-cells = <0>;
+			reg = <0xa8000 0x40>;
+			reg-names = "phy_base";
+			resets = <&gcc USB2_HSPHY_POR_ARES>, <&gcc USB2_HSPHY_S_ARES>;
+			reset-names = "por_rst", "srif_rst";
+			status = "disabled";
+		};
+
+		usb2@60f8800 {
+			compatible = "qcom,dwc3";
+			reg = <0x60f8800 0x100>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			clocks = <&gcc GCC_USB2_MASTER_CLK>,
+				 <&gcc GCC_USB2_SLEEP_CLK>,
+				 <&gcc GCC_USB2_MOCK_UTMI_CLK>;
+			clock-names = "master", "sleep", "mock_utmi";
+			ranges;
+			status = "disabled";
+
+			dwc3@6000000 {
+				compatible = "snps,dwc3";
+				reg = <0x6000000 0xf8000>;
+				interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+				phys = <&usb2_hs_phy>;
+				phy-names = "usb2-phy";
+				dr_mode = "host";
+			};
+		};
 	};
 };
-- 
2.24.1


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 1/3] phy: add driver for Qualcomm IPQ40xx USB PHY
  2020-01-27 21:23 [PATCH v3 1/3] phy: add driver for Qualcomm IPQ40xx USB PHY Robert Marko
  2020-01-27 21:23 ` [PATCH v3 2/3] dt-bindings: phy-qcom-ipq4019-usb: add binding document Robert Marko
  2020-01-27 21:23 ` [PATCH v3 3/3] ARM: dts: qcom: ipq4019: add USB devicetree nodes Robert Marko
@ 2020-03-08 18:55 ` Robert Marko
  2020-03-25 10:24 ` Robert Marko
  2020-03-27 22:14 ` Bjorn Andersson
  4 siblings, 0 replies; 10+ messages in thread
From: Robert Marko @ 2020-03-08 18:55 UTC (permalink / raw)
  To: John Crispin, agross, linux-arm-msm; +Cc: Luka Perkov

On Mon, Jan 27, 2020 at 10:23 PM Robert Marko <robert.marko@sartura.hr> wrote:
>
> From: John Crispin <john@phrozen.org>
>
> Add a driver to setup the USB phy on Qualcom Dakota SoCs.
> The driver sets up HS and SS phys.
>
Hi,
any chance of merging this?

Thanks
> Signed-off-by: John Crispin <john@phrozen.org>
> Signed-off-by: Robert Marko <robert.marko@sartura.hr>
> Cc: Luka Perkov <luka.perkov@sartura.hr>
> ---
> Changes from v2 to v3:
> * Remove magic writes as they are not needed
> * Correct commit message
>
>  drivers/phy/qualcomm/Kconfig                |   7 +
>  drivers/phy/qualcomm/Makefile               |   1 +
>  drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c | 152 ++++++++++++++++++++
>  3 files changed, 160 insertions(+)
>  create mode 100644 drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
>
> diff --git a/drivers/phy/qualcomm/Kconfig b/drivers/phy/qualcomm/Kconfig
> index e46824da29f6..964bd5d784d2 100644
> --- a/drivers/phy/qualcomm/Kconfig
> +++ b/drivers/phy/qualcomm/Kconfig
> @@ -18,6 +18,13 @@ config PHY_QCOM_APQ8064_SATA
>         depends on OF
>         select GENERIC_PHY
>
> +config PHY_QCOM_IPQ4019_USB
> +       tristate "Qualcomm IPQ4019 USB PHY module"
> +       depends on OF && ARCH_QCOM
> +       select GENERIC_PHY
> +       help
> +         Support for the USB PHY on QCOM IPQ4019/Dakota chipsets.
> +
>  config PHY_QCOM_IPQ806X_SATA
>         tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
>         depends on ARCH_QCOM
> diff --git a/drivers/phy/qualcomm/Makefile b/drivers/phy/qualcomm/Makefile
> index 283251d6a5d9..8afe6c4f5178 100644
> --- a/drivers/phy/qualcomm/Makefile
> +++ b/drivers/phy/qualcomm/Makefile
> @@ -1,6 +1,7 @@
>  # SPDX-License-Identifier: GPL-2.0
>  obj-$(CONFIG_PHY_ATH79_USB)            += phy-ath79-usb.o
>  obj-$(CONFIG_PHY_QCOM_APQ8064_SATA)    += phy-qcom-apq8064-sata.o
> +obj-$(CONFIG_PHY_QCOM_IPQ4019_USB)     += phy-qcom-ipq4019-usb.o
>  obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA)    += phy-qcom-ipq806x-sata.o
>  obj-$(CONFIG_PHY_QCOM_PCIE2)           += phy-qcom-pcie2.o
>  obj-$(CONFIG_PHY_QCOM_QMP)             += phy-qcom-qmp.o
> diff --git a/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c b/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
> new file mode 100644
> index 000000000000..7efebae6b6fd
> --- /dev/null
> +++ b/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
> @@ -0,0 +1,152 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (C) 2018 John Crispin <john@phrozen.org>
> + *
> + * Based on code from
> + * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
> + *
> + */
> +
> +#include <linux/delay.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/mutex.h>
> +#include <linux/of_platform.h>
> +#include <linux/phy/phy.h>
> +#include <linux/platform_device.h>
> +#include <linux/reset.h>
> +
> +struct ipq4019_usb_phy {
> +       struct device           *dev;
> +       struct phy              *phy;
> +       void __iomem            *base;
> +       struct reset_control    *por_rst;
> +       struct reset_control    *srif_rst;
> +};
> +
> +static int ipq4019_ss_phy_power_off(struct phy *_phy)
> +{
> +       struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
> +
> +       reset_control_assert(phy->por_rst);
> +       msleep(10);
> +
> +       return 0;
> +}
> +
> +static int ipq4019_ss_phy_power_on(struct phy *_phy)
> +{
> +       struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
> +
> +       ipq4019_ss_phy_power_off(_phy);
> +
> +       reset_control_deassert(phy->por_rst);
> +
> +       return 0;
> +}
> +
> +static struct phy_ops ipq4019_usb_ss_phy_ops = {
> +       .power_on       = ipq4019_ss_phy_power_on,
> +       .power_off      = ipq4019_ss_phy_power_off,
> +};
> +
> +static int ipq4019_hs_phy_power_off(struct phy *_phy)
> +{
> +       struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
> +
> +       reset_control_assert(phy->por_rst);
> +       msleep(10);
> +
> +       reset_control_assert(phy->srif_rst);
> +       msleep(10);
> +
> +       return 0;
> +}
> +
> +static int ipq4019_hs_phy_power_on(struct phy *_phy)
> +{
> +       struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
> +
> +       ipq4019_hs_phy_power_off(_phy);
> +
> +       reset_control_deassert(phy->srif_rst);
> +       msleep(10);
> +
> +       reset_control_deassert(phy->por_rst);
> +
> +       return 0;
> +}
> +
> +static struct phy_ops ipq4019_usb_hs_phy_ops = {
> +       .power_on       = ipq4019_hs_phy_power_on,
> +       .power_off      = ipq4019_hs_phy_power_off,
> +};
> +
> +static const struct of_device_id ipq4019_usb_phy_of_match[] = {
> +       { .compatible = "qcom,usb-hs-ipq4019-phy", .data = &ipq4019_usb_hs_phy_ops},
> +       { .compatible = "qcom,usb-ss-ipq4019-phy", .data = &ipq4019_usb_ss_phy_ops},
> +       { },
> +};
> +MODULE_DEVICE_TABLE(of, ipq4019_usb_phy_of_match);
> +
> +static int ipq4019_usb_phy_probe(struct platform_device *pdev)
> +{
> +       struct device *dev = &pdev->dev;
> +       struct resource *res;
> +       struct phy_provider *phy_provider;
> +       struct ipq4019_usb_phy *phy;
> +       const struct of_device_id *match;
> +
> +       match = of_match_device(ipq4019_usb_phy_of_match, &pdev->dev);
> +       if (!match)
> +               return -ENODEV;
> +
> +       phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
> +       if (!phy)
> +               return -ENOMEM;
> +
> +       phy->dev = &pdev->dev;
> +       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +       phy->base = devm_ioremap_resource(&pdev->dev, res);
> +       if (IS_ERR(phy->base)) {
> +               dev_err(dev, "failed to remap register memory\n");
> +               return PTR_ERR(phy->base);
> +       }
> +
> +       phy->por_rst = devm_reset_control_get(phy->dev, "por_rst");
> +       if (IS_ERR(phy->por_rst)) {
> +               if (PTR_ERR(phy->por_rst) != -EPROBE_DEFER)
> +                       dev_err(dev, "POR reset is missing\n");
> +               return PTR_ERR(phy->por_rst);
> +       }
> +
> +       phy->srif_rst = devm_reset_control_get_optional(phy->dev, "srif_rst");
> +       if (IS_ERR(phy->srif_rst))
> +               return PTR_ERR(phy->srif_rst);
> +
> +       phy->phy = devm_phy_create(dev, NULL, match->data);
> +       if (IS_ERR(phy->phy)) {
> +               dev_err(dev, "failed to create PHY\n");
> +               return PTR_ERR(phy->phy);
> +       }
> +       phy_set_drvdata(phy->phy, phy);
> +
> +       phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
> +
> +       return PTR_ERR_OR_ZERO(phy_provider);
> +}
> +
> +static struct platform_driver ipq4019_usb_phy_driver = {
> +       .probe  = ipq4019_usb_phy_probe,
> +       .driver = {
> +               .of_match_table = ipq4019_usb_phy_of_match,
> +               .name  = "ipq4019-usb-phy",
> +       }
> +};
> +module_platform_driver(ipq4019_usb_phy_driver);
> +
> +MODULE_DESCRIPTION("QCOM/IPQ4019 USB phy driver");
> +MODULE_AUTHOR("John Crispin <john@phrozen.org>");
> +MODULE_LICENSE("GPL v2");
> --
> 2.24.1
>

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 1/3] phy: add driver for Qualcomm IPQ40xx USB PHY
  2020-01-27 21:23 [PATCH v3 1/3] phy: add driver for Qualcomm IPQ40xx USB PHY Robert Marko
                   ` (2 preceding siblings ...)
  2020-03-08 18:55 ` [PATCH v3 1/3] phy: add driver for Qualcomm IPQ40xx USB PHY Robert Marko
@ 2020-03-25 10:24 ` Robert Marko
  2020-03-25 10:45   ` John Crispin
  2020-03-27 22:14 ` Bjorn Andersson
  4 siblings, 1 reply; 10+ messages in thread
From: Robert Marko @ 2020-03-25 10:24 UTC (permalink / raw)
  To: John Crispin, agross, linux-arm-msm; +Cc: Luka Perkov

On Mon, Jan 27, 2020 at 10:23 PM Robert Marko <robert.marko@sartura.hr> wrote:
>
> From: John Crispin <john@phrozen.org>
>
> Add a driver to setup the USB phy on Qualcom Dakota SoCs.
> The driver sets up HS and SS phys.
John, any blockers?

Thanks
>
> Signed-off-by: John Crispin <john@phrozen.org>
> Signed-off-by: Robert Marko <robert.marko@sartura.hr>
> Cc: Luka Perkov <luka.perkov@sartura.hr>
> ---
> Changes from v2 to v3:
> * Remove magic writes as they are not needed
> * Correct commit message
>
>  drivers/phy/qualcomm/Kconfig                |   7 +
>  drivers/phy/qualcomm/Makefile               |   1 +
>  drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c | 152 ++++++++++++++++++++
>  3 files changed, 160 insertions(+)
>  create mode 100644 drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
>
> diff --git a/drivers/phy/qualcomm/Kconfig b/drivers/phy/qualcomm/Kconfig
> index e46824da29f6..964bd5d784d2 100644
> --- a/drivers/phy/qualcomm/Kconfig
> +++ b/drivers/phy/qualcomm/Kconfig
> @@ -18,6 +18,13 @@ config PHY_QCOM_APQ8064_SATA
>         depends on OF
>         select GENERIC_PHY
>
> +config PHY_QCOM_IPQ4019_USB
> +       tristate "Qualcomm IPQ4019 USB PHY module"
> +       depends on OF && ARCH_QCOM
> +       select GENERIC_PHY
> +       help
> +         Support for the USB PHY on QCOM IPQ4019/Dakota chipsets.
> +
>  config PHY_QCOM_IPQ806X_SATA
>         tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
>         depends on ARCH_QCOM
> diff --git a/drivers/phy/qualcomm/Makefile b/drivers/phy/qualcomm/Makefile
> index 283251d6a5d9..8afe6c4f5178 100644
> --- a/drivers/phy/qualcomm/Makefile
> +++ b/drivers/phy/qualcomm/Makefile
> @@ -1,6 +1,7 @@
>  # SPDX-License-Identifier: GPL-2.0
>  obj-$(CONFIG_PHY_ATH79_USB)            += phy-ath79-usb.o
>  obj-$(CONFIG_PHY_QCOM_APQ8064_SATA)    += phy-qcom-apq8064-sata.o
> +obj-$(CONFIG_PHY_QCOM_IPQ4019_USB)     += phy-qcom-ipq4019-usb.o
>  obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA)    += phy-qcom-ipq806x-sata.o
>  obj-$(CONFIG_PHY_QCOM_PCIE2)           += phy-qcom-pcie2.o
>  obj-$(CONFIG_PHY_QCOM_QMP)             += phy-qcom-qmp.o
> diff --git a/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c b/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
> new file mode 100644
> index 000000000000..7efebae6b6fd
> --- /dev/null
> +++ b/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
> @@ -0,0 +1,152 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (C) 2018 John Crispin <john@phrozen.org>
> + *
> + * Based on code from
> + * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
> + *
> + */
> +
> +#include <linux/delay.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/mutex.h>
> +#include <linux/of_platform.h>
> +#include <linux/phy/phy.h>
> +#include <linux/platform_device.h>
> +#include <linux/reset.h>
> +
> +struct ipq4019_usb_phy {
> +       struct device           *dev;
> +       struct phy              *phy;
> +       void __iomem            *base;
> +       struct reset_control    *por_rst;
> +       struct reset_control    *srif_rst;
> +};
> +
> +static int ipq4019_ss_phy_power_off(struct phy *_phy)
> +{
> +       struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
> +
> +       reset_control_assert(phy->por_rst);
> +       msleep(10);
> +
> +       return 0;
> +}
> +
> +static int ipq4019_ss_phy_power_on(struct phy *_phy)
> +{
> +       struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
> +
> +       ipq4019_ss_phy_power_off(_phy);
> +
> +       reset_control_deassert(phy->por_rst);
> +
> +       return 0;
> +}
> +
> +static struct phy_ops ipq4019_usb_ss_phy_ops = {
> +       .power_on       = ipq4019_ss_phy_power_on,
> +       .power_off      = ipq4019_ss_phy_power_off,
> +};
> +
> +static int ipq4019_hs_phy_power_off(struct phy *_phy)
> +{
> +       struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
> +
> +       reset_control_assert(phy->por_rst);
> +       msleep(10);
> +
> +       reset_control_assert(phy->srif_rst);
> +       msleep(10);
> +
> +       return 0;
> +}
> +
> +static int ipq4019_hs_phy_power_on(struct phy *_phy)
> +{
> +       struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
> +
> +       ipq4019_hs_phy_power_off(_phy);
> +
> +       reset_control_deassert(phy->srif_rst);
> +       msleep(10);
> +
> +       reset_control_deassert(phy->por_rst);
> +
> +       return 0;
> +}
> +
> +static struct phy_ops ipq4019_usb_hs_phy_ops = {
> +       .power_on       = ipq4019_hs_phy_power_on,
> +       .power_off      = ipq4019_hs_phy_power_off,
> +};
> +
> +static const struct of_device_id ipq4019_usb_phy_of_match[] = {
> +       { .compatible = "qcom,usb-hs-ipq4019-phy", .data = &ipq4019_usb_hs_phy_ops},
> +       { .compatible = "qcom,usb-ss-ipq4019-phy", .data = &ipq4019_usb_ss_phy_ops},
> +       { },
> +};
> +MODULE_DEVICE_TABLE(of, ipq4019_usb_phy_of_match);
> +
> +static int ipq4019_usb_phy_probe(struct platform_device *pdev)
> +{
> +       struct device *dev = &pdev->dev;
> +       struct resource *res;
> +       struct phy_provider *phy_provider;
> +       struct ipq4019_usb_phy *phy;
> +       const struct of_device_id *match;
> +
> +       match = of_match_device(ipq4019_usb_phy_of_match, &pdev->dev);
> +       if (!match)
> +               return -ENODEV;
> +
> +       phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
> +       if (!phy)
> +               return -ENOMEM;
> +
> +       phy->dev = &pdev->dev;
> +       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +       phy->base = devm_ioremap_resource(&pdev->dev, res);
> +       if (IS_ERR(phy->base)) {
> +               dev_err(dev, "failed to remap register memory\n");
> +               return PTR_ERR(phy->base);
> +       }
> +
> +       phy->por_rst = devm_reset_control_get(phy->dev, "por_rst");
> +       if (IS_ERR(phy->por_rst)) {
> +               if (PTR_ERR(phy->por_rst) != -EPROBE_DEFER)
> +                       dev_err(dev, "POR reset is missing\n");
> +               return PTR_ERR(phy->por_rst);
> +       }
> +
> +       phy->srif_rst = devm_reset_control_get_optional(phy->dev, "srif_rst");
> +       if (IS_ERR(phy->srif_rst))
> +               return PTR_ERR(phy->srif_rst);
> +
> +       phy->phy = devm_phy_create(dev, NULL, match->data);
> +       if (IS_ERR(phy->phy)) {
> +               dev_err(dev, "failed to create PHY\n");
> +               return PTR_ERR(phy->phy);
> +       }
> +       phy_set_drvdata(phy->phy, phy);
> +
> +       phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
> +
> +       return PTR_ERR_OR_ZERO(phy_provider);
> +}
> +
> +static struct platform_driver ipq4019_usb_phy_driver = {
> +       .probe  = ipq4019_usb_phy_probe,
> +       .driver = {
> +               .of_match_table = ipq4019_usb_phy_of_match,
> +               .name  = "ipq4019-usb-phy",
> +       }
> +};
> +module_platform_driver(ipq4019_usb_phy_driver);
> +
> +MODULE_DESCRIPTION("QCOM/IPQ4019 USB phy driver");
> +MODULE_AUTHOR("John Crispin <john@phrozen.org>");
> +MODULE_LICENSE("GPL v2");
> --
> 2.24.1
>

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 1/3] phy: add driver for Qualcomm IPQ40xx USB PHY
  2020-03-25 10:24 ` Robert Marko
@ 2020-03-25 10:45   ` John Crispin
  0 siblings, 0 replies; 10+ messages in thread
From: John Crispin @ 2020-03-25 10:45 UTC (permalink / raw)
  To: Robert Marko, agross, linux-arm-msm; +Cc: Luka Perkov


On 25.03.20 11:24, Robert Marko wrote:
> On Mon, Jan 27, 2020 at 10:23 PM Robert Marko <robert.marko@sartura.hr> wrote:
>> From: John Crispin <john@phrozen.org>
>>
>> Add a driver to setup the USB phy on Qualcom Dakota SoCs.
>> The driver sets up HS and SS phys.
> John, any blockers?
>
> Thanks

not from my side, no idea why it is not getting merged

     John




>> Signed-off-by: John Crispin <john@phrozen.org>
>> Signed-off-by: Robert Marko <robert.marko@sartura.hr>
>> Cc: Luka Perkov <luka.perkov@sartura.hr>
>> ---
>> Changes from v2 to v3:
>> * Remove magic writes as they are not needed
>> * Correct commit message
>>
>>   drivers/phy/qualcomm/Kconfig                |   7 +
>>   drivers/phy/qualcomm/Makefile               |   1 +
>>   drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c | 152 ++++++++++++++++++++
>>   3 files changed, 160 insertions(+)
>>   create mode 100644 drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
>>
>> diff --git a/drivers/phy/qualcomm/Kconfig b/drivers/phy/qualcomm/Kconfig
>> index e46824da29f6..964bd5d784d2 100644
>> --- a/drivers/phy/qualcomm/Kconfig
>> +++ b/drivers/phy/qualcomm/Kconfig
>> @@ -18,6 +18,13 @@ config PHY_QCOM_APQ8064_SATA
>>          depends on OF
>>          select GENERIC_PHY
>>
>> +config PHY_QCOM_IPQ4019_USB
>> +       tristate "Qualcomm IPQ4019 USB PHY module"
>> +       depends on OF && ARCH_QCOM
>> +       select GENERIC_PHY
>> +       help
>> +         Support for the USB PHY on QCOM IPQ4019/Dakota chipsets.
>> +
>>   config PHY_QCOM_IPQ806X_SATA
>>          tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
>>          depends on ARCH_QCOM
>> diff --git a/drivers/phy/qualcomm/Makefile b/drivers/phy/qualcomm/Makefile
>> index 283251d6a5d9..8afe6c4f5178 100644
>> --- a/drivers/phy/qualcomm/Makefile
>> +++ b/drivers/phy/qualcomm/Makefile
>> @@ -1,6 +1,7 @@
>>   # SPDX-License-Identifier: GPL-2.0
>>   obj-$(CONFIG_PHY_ATH79_USB)            += phy-ath79-usb.o
>>   obj-$(CONFIG_PHY_QCOM_APQ8064_SATA)    += phy-qcom-apq8064-sata.o
>> +obj-$(CONFIG_PHY_QCOM_IPQ4019_USB)     += phy-qcom-ipq4019-usb.o
>>   obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA)    += phy-qcom-ipq806x-sata.o
>>   obj-$(CONFIG_PHY_QCOM_PCIE2)           += phy-qcom-pcie2.o
>>   obj-$(CONFIG_PHY_QCOM_QMP)             += phy-qcom-qmp.o
>> diff --git a/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c b/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
>> new file mode 100644
>> index 000000000000..7efebae6b6fd
>> --- /dev/null
>> +++ b/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
>> @@ -0,0 +1,152 @@
>> +// SPDX-License-Identifier: GPL-2.0-or-later
>> +/*
>> + * Copyright (C) 2018 John Crispin <john@phrozen.org>
>> + *
>> + * Based on code from
>> + * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
>> + *
>> + */
>> +
>> +#include <linux/delay.h>
>> +#include <linux/err.h>
>> +#include <linux/io.h>
>> +#include <linux/kernel.h>
>> +#include <linux/module.h>
>> +#include <linux/mutex.h>
>> +#include <linux/of_platform.h>
>> +#include <linux/phy/phy.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/reset.h>
>> +
>> +struct ipq4019_usb_phy {
>> +       struct device           *dev;
>> +       struct phy              *phy;
>> +       void __iomem            *base;
>> +       struct reset_control    *por_rst;
>> +       struct reset_control    *srif_rst;
>> +};
>> +
>> +static int ipq4019_ss_phy_power_off(struct phy *_phy)
>> +{
>> +       struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
>> +
>> +       reset_control_assert(phy->por_rst);
>> +       msleep(10);
>> +
>> +       return 0;
>> +}
>> +
>> +static int ipq4019_ss_phy_power_on(struct phy *_phy)
>> +{
>> +       struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
>> +
>> +       ipq4019_ss_phy_power_off(_phy);
>> +
>> +       reset_control_deassert(phy->por_rst);
>> +
>> +       return 0;
>> +}
>> +
>> +static struct phy_ops ipq4019_usb_ss_phy_ops = {
>> +       .power_on       = ipq4019_ss_phy_power_on,
>> +       .power_off      = ipq4019_ss_phy_power_off,
>> +};
>> +
>> +static int ipq4019_hs_phy_power_off(struct phy *_phy)
>> +{
>> +       struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
>> +
>> +       reset_control_assert(phy->por_rst);
>> +       msleep(10);
>> +
>> +       reset_control_assert(phy->srif_rst);
>> +       msleep(10);
>> +
>> +       return 0;
>> +}
>> +
>> +static int ipq4019_hs_phy_power_on(struct phy *_phy)
>> +{
>> +       struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
>> +
>> +       ipq4019_hs_phy_power_off(_phy);
>> +
>> +       reset_control_deassert(phy->srif_rst);
>> +       msleep(10);
>> +
>> +       reset_control_deassert(phy->por_rst);
>> +
>> +       return 0;
>> +}
>> +
>> +static struct phy_ops ipq4019_usb_hs_phy_ops = {
>> +       .power_on       = ipq4019_hs_phy_power_on,
>> +       .power_off      = ipq4019_hs_phy_power_off,
>> +};
>> +
>> +static const struct of_device_id ipq4019_usb_phy_of_match[] = {
>> +       { .compatible = "qcom,usb-hs-ipq4019-phy", .data = &ipq4019_usb_hs_phy_ops},
>> +       { .compatible = "qcom,usb-ss-ipq4019-phy", .data = &ipq4019_usb_ss_phy_ops},
>> +       { },
>> +};
>> +MODULE_DEVICE_TABLE(of, ipq4019_usb_phy_of_match);
>> +
>> +static int ipq4019_usb_phy_probe(struct platform_device *pdev)
>> +{
>> +       struct device *dev = &pdev->dev;
>> +       struct resource *res;
>> +       struct phy_provider *phy_provider;
>> +       struct ipq4019_usb_phy *phy;
>> +       const struct of_device_id *match;
>> +
>> +       match = of_match_device(ipq4019_usb_phy_of_match, &pdev->dev);
>> +       if (!match)
>> +               return -ENODEV;
>> +
>> +       phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
>> +       if (!phy)
>> +               return -ENOMEM;
>> +
>> +       phy->dev = &pdev->dev;
>> +       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> +       phy->base = devm_ioremap_resource(&pdev->dev, res);
>> +       if (IS_ERR(phy->base)) {
>> +               dev_err(dev, "failed to remap register memory\n");
>> +               return PTR_ERR(phy->base);
>> +       }
>> +
>> +       phy->por_rst = devm_reset_control_get(phy->dev, "por_rst");
>> +       if (IS_ERR(phy->por_rst)) {
>> +               if (PTR_ERR(phy->por_rst) != -EPROBE_DEFER)
>> +                       dev_err(dev, "POR reset is missing\n");
>> +               return PTR_ERR(phy->por_rst);
>> +       }
>> +
>> +       phy->srif_rst = devm_reset_control_get_optional(phy->dev, "srif_rst");
>> +       if (IS_ERR(phy->srif_rst))
>> +               return PTR_ERR(phy->srif_rst);
>> +
>> +       phy->phy = devm_phy_create(dev, NULL, match->data);
>> +       if (IS_ERR(phy->phy)) {
>> +               dev_err(dev, "failed to create PHY\n");
>> +               return PTR_ERR(phy->phy);
>> +       }
>> +       phy_set_drvdata(phy->phy, phy);
>> +
>> +       phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
>> +
>> +       return PTR_ERR_OR_ZERO(phy_provider);
>> +}
>> +
>> +static struct platform_driver ipq4019_usb_phy_driver = {
>> +       .probe  = ipq4019_usb_phy_probe,
>> +       .driver = {
>> +               .of_match_table = ipq4019_usb_phy_of_match,
>> +               .name  = "ipq4019-usb-phy",
>> +       }
>> +};
>> +module_platform_driver(ipq4019_usb_phy_driver);
>> +
>> +MODULE_DESCRIPTION("QCOM/IPQ4019 USB phy driver");
>> +MODULE_AUTHOR("John Crispin <john@phrozen.org>");
>> +MODULE_LICENSE("GPL v2");
>> --
>> 2.24.1
>>

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 3/3] ARM: dts: qcom: ipq4019: add USB devicetree nodes
  2020-01-27 21:23 ` [PATCH v3 3/3] ARM: dts: qcom: ipq4019: add USB devicetree nodes Robert Marko
@ 2020-03-27 22:12   ` Bjorn Andersson
  2020-03-28 13:58     ` Robert Marko
  0 siblings, 1 reply; 10+ messages in thread
From: Bjorn Andersson @ 2020-03-27 22:12 UTC (permalink / raw)
  To: Robert Marko; +Cc: john, agross, linux-arm-msm, Luka Perkov

On Mon 27 Jan 13:23 PST 2020, Robert Marko wrote:

> From: John Crispin <john@phrozen.org>
> 
> Since we now have driver for the USB PHY, lets add the necessary nodes to DTSI.
> 
> Signed-off-by: John Crispin <john@phrozen.org>
> Tested-by: Robert Marko <robert.marko@sartura.hr>
> Cc: Luka Perkov <luka.perkov@sartura.hr>

Robert, I'm missing your Signed-off-by here (and I would like Kishon to
take the PHY before merging this).

Regards,
Bjorn

> ---
>  arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 20 +++++
>  arch/arm/boot/dts/qcom-ipq4019.dtsi           | 74 +++++++++++++++++++
>  2 files changed, 94 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
> index 418f9a022336..2ee5f05d5a43 100644
> --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
> @@ -109,5 +109,25 @@
>  		wifi@a800000 {
>  			status = "ok";
>  		};
> +
> +		usb3_ss_phy: ssphy@9a000 {
> +			status = "ok";
> +		};
> +
> +		usb3_hs_phy: hsphy@a6000 {
> +			status = "ok";
> +		};
> +
> +		usb3: usb3@8af8800 {
> +			status = "ok";
> +		};
> +
> +		usb2_hs_phy: hsphy@a8000 {
> +			status = "ok";
> +		};
> +
> +		usb2: usb2@60f8800 {
> +			status = "ok";
> +		};
>  	};
>  };
> diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
> index b6e5203a210b..18e9c639514c 100644
> --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
> @@ -564,5 +564,79 @@
>  					  "legacy";
>  			status = "disabled";
>  		};
> +
> +		usb3_ss_phy: ssphy@9a000 {
> +			compatible = "qcom,usb-ss-ipq4019-phy";
> +			#phy-cells = <0>;
> +			reg = <0x9a000 0x800>;
> +			reg-names = "phy_base";
> +			resets = <&gcc USB3_UNIPHY_PHY_ARES>;
> +			reset-names = "por_rst";
> +			status = "disabled";
> +		};
> +
> +		usb3_hs_phy: hsphy@a6000 {
> +			compatible = "qcom,usb-hs-ipq4019-phy";
> +			#phy-cells = <0>;
> +			reg = <0xa6000 0x40>;
> +			reg-names = "phy_base";
> +			resets = <&gcc USB3_HSPHY_POR_ARES>, <&gcc USB3_HSPHY_S_ARES>;
> +			reset-names = "por_rst", "srif_rst";
> +			status = "disabled";
> +		};
> +
> +		usb3@8af8800 {
> +			compatible = "qcom,dwc3";
> +			reg = <0x8af8800 0x100>;
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			clocks = <&gcc GCC_USB3_MASTER_CLK>,
> +				 <&gcc GCC_USB3_SLEEP_CLK>,
> +				 <&gcc GCC_USB3_MOCK_UTMI_CLK>;
> +			clock-names = "master", "sleep", "mock_utmi";
> +			ranges;
> +			status = "disabled";
> +
> +			dwc3@8a00000 {
> +				compatible = "snps,dwc3";
> +				reg = <0x8a00000 0xf8000>;
> +				interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
> +				phys = <&usb3_hs_phy>, <&usb3_ss_phy>;
> +				phy-names = "usb2-phy", "usb3-phy";
> +				dr_mode = "host";
> +			};
> +		};
> +
> +		usb2_hs_phy: hsphy@a8000 {
> +			compatible = "qcom,usb-hs-ipq4019-phy";
> +			#phy-cells = <0>;
> +			reg = <0xa8000 0x40>;
> +			reg-names = "phy_base";
> +			resets = <&gcc USB2_HSPHY_POR_ARES>, <&gcc USB2_HSPHY_S_ARES>;
> +			reset-names = "por_rst", "srif_rst";
> +			status = "disabled";
> +		};
> +
> +		usb2@60f8800 {
> +			compatible = "qcom,dwc3";
> +			reg = <0x60f8800 0x100>;
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			clocks = <&gcc GCC_USB2_MASTER_CLK>,
> +				 <&gcc GCC_USB2_SLEEP_CLK>,
> +				 <&gcc GCC_USB2_MOCK_UTMI_CLK>;
> +			clock-names = "master", "sleep", "mock_utmi";
> +			ranges;
> +			status = "disabled";
> +
> +			dwc3@6000000 {
> +				compatible = "snps,dwc3";
> +				reg = <0x6000000 0xf8000>;
> +				interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
> +				phys = <&usb2_hs_phy>;
> +				phy-names = "usb2-phy";
> +				dr_mode = "host";
> +			};
> +		};
>  	};
>  };
> -- 
> 2.24.1
> 

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 1/3] phy:  add driver for Qualcomm IPQ40xx USB PHY
  2020-01-27 21:23 [PATCH v3 1/3] phy: add driver for Qualcomm IPQ40xx USB PHY Robert Marko
                   ` (3 preceding siblings ...)
  2020-03-25 10:24 ` Robert Marko
@ 2020-03-27 22:14 ` Bjorn Andersson
  2020-03-28 13:57   ` Robert Marko
  4 siblings, 1 reply; 10+ messages in thread
From: Bjorn Andersson @ 2020-03-27 22:14 UTC (permalink / raw)
  To: Robert Marko; +Cc: john, agross, linux-arm-msm, Luka Perkov

On Mon 27 Jan 13:23 PST 2020, Robert Marko wrote:

> From: John Crispin <john@phrozen.org>
> 
> Add a driver to setup the USB phy on Qualcom Dakota SoCs.
> The driver sets up HS and SS phys.
> 
> Signed-off-by: John Crispin <john@phrozen.org>
> Signed-off-by: Robert Marko <robert.marko@sartura.hr>
> Cc: Luka Perkov <luka.perkov@sartura.hr>

You didn't include any of the PHY or devicetree maintainers on your
patches. Please resubmit them, with recipients as reported by
scripts/get_maintainer.pl.

Thanks,
Bjorn

> ---
> Changes from v2 to v3:
> * Remove magic writes as they are not needed
> * Correct commit message
> 
>  drivers/phy/qualcomm/Kconfig                |   7 +
>  drivers/phy/qualcomm/Makefile               |   1 +
>  drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c | 152 ++++++++++++++++++++
>  3 files changed, 160 insertions(+)
>  create mode 100644 drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
> 
> diff --git a/drivers/phy/qualcomm/Kconfig b/drivers/phy/qualcomm/Kconfig
> index e46824da29f6..964bd5d784d2 100644
> --- a/drivers/phy/qualcomm/Kconfig
> +++ b/drivers/phy/qualcomm/Kconfig
> @@ -18,6 +18,13 @@ config PHY_QCOM_APQ8064_SATA
>  	depends on OF
>  	select GENERIC_PHY
>  
> +config PHY_QCOM_IPQ4019_USB
> +	tristate "Qualcomm IPQ4019 USB PHY module"
> +	depends on OF && ARCH_QCOM
> +	select GENERIC_PHY
> +	help
> +	  Support for the USB PHY on QCOM IPQ4019/Dakota chipsets.
> +
>  config PHY_QCOM_IPQ806X_SATA
>  	tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
>  	depends on ARCH_QCOM
> diff --git a/drivers/phy/qualcomm/Makefile b/drivers/phy/qualcomm/Makefile
> index 283251d6a5d9..8afe6c4f5178 100644
> --- a/drivers/phy/qualcomm/Makefile
> +++ b/drivers/phy/qualcomm/Makefile
> @@ -1,6 +1,7 @@
>  # SPDX-License-Identifier: GPL-2.0
>  obj-$(CONFIG_PHY_ATH79_USB)		+= phy-ath79-usb.o
>  obj-$(CONFIG_PHY_QCOM_APQ8064_SATA)	+= phy-qcom-apq8064-sata.o
> +obj-$(CONFIG_PHY_QCOM_IPQ4019_USB)	+= phy-qcom-ipq4019-usb.o
>  obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA)	+= phy-qcom-ipq806x-sata.o
>  obj-$(CONFIG_PHY_QCOM_PCIE2)		+= phy-qcom-pcie2.o
>  obj-$(CONFIG_PHY_QCOM_QMP)		+= phy-qcom-qmp.o
> diff --git a/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c b/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
> new file mode 100644
> index 000000000000..7efebae6b6fd
> --- /dev/null
> +++ b/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
> @@ -0,0 +1,152 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (C) 2018 John Crispin <john@phrozen.org>
> + *
> + * Based on code from
> + * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
> + *
> + */
> +
> +#include <linux/delay.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/mutex.h>
> +#include <linux/of_platform.h>
> +#include <linux/phy/phy.h>
> +#include <linux/platform_device.h>
> +#include <linux/reset.h>
> +
> +struct ipq4019_usb_phy {
> +	struct device		*dev;
> +	struct phy		*phy;
> +	void __iomem		*base;
> +	struct reset_control	*por_rst;
> +	struct reset_control	*srif_rst;
> +};
> +
> +static int ipq4019_ss_phy_power_off(struct phy *_phy)
> +{
> +	struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
> +
> +	reset_control_assert(phy->por_rst);
> +	msleep(10);
> +
> +	return 0;
> +}
> +
> +static int ipq4019_ss_phy_power_on(struct phy *_phy)
> +{
> +	struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
> +
> +	ipq4019_ss_phy_power_off(_phy);
> +
> +	reset_control_deassert(phy->por_rst);
> +
> +	return 0;
> +}
> +
> +static struct phy_ops ipq4019_usb_ss_phy_ops = {
> +	.power_on	= ipq4019_ss_phy_power_on,
> +	.power_off	= ipq4019_ss_phy_power_off,
> +};
> +
> +static int ipq4019_hs_phy_power_off(struct phy *_phy)
> +{
> +	struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
> +
> +	reset_control_assert(phy->por_rst);
> +	msleep(10);
> +
> +	reset_control_assert(phy->srif_rst);
> +	msleep(10);
> +
> +	return 0;
> +}
> +
> +static int ipq4019_hs_phy_power_on(struct phy *_phy)
> +{
> +	struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
> +
> +	ipq4019_hs_phy_power_off(_phy);
> +
> +	reset_control_deassert(phy->srif_rst);
> +	msleep(10);
> +
> +	reset_control_deassert(phy->por_rst);
> +
> +	return 0;
> +}
> +
> +static struct phy_ops ipq4019_usb_hs_phy_ops = {
> +	.power_on	= ipq4019_hs_phy_power_on,
> +	.power_off	= ipq4019_hs_phy_power_off,
> +};
> +
> +static const struct of_device_id ipq4019_usb_phy_of_match[] = {
> +	{ .compatible = "qcom,usb-hs-ipq4019-phy", .data = &ipq4019_usb_hs_phy_ops},
> +	{ .compatible = "qcom,usb-ss-ipq4019-phy", .data = &ipq4019_usb_ss_phy_ops},
> +	{ },
> +};
> +MODULE_DEVICE_TABLE(of, ipq4019_usb_phy_of_match);
> +
> +static int ipq4019_usb_phy_probe(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct resource *res;
> +	struct phy_provider *phy_provider;
> +	struct ipq4019_usb_phy *phy;
> +	const struct of_device_id *match;
> +
> +	match = of_match_device(ipq4019_usb_phy_of_match, &pdev->dev);
> +	if (!match)
> +		return -ENODEV;
> +
> +	phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
> +	if (!phy)
> +		return -ENOMEM;
> +
> +	phy->dev = &pdev->dev;
> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	phy->base = devm_ioremap_resource(&pdev->dev, res);
> +	if (IS_ERR(phy->base)) {
> +		dev_err(dev, "failed to remap register memory\n");
> +		return PTR_ERR(phy->base);
> +	}
> +
> +	phy->por_rst = devm_reset_control_get(phy->dev, "por_rst");
> +	if (IS_ERR(phy->por_rst)) {
> +		if (PTR_ERR(phy->por_rst) != -EPROBE_DEFER)
> +			dev_err(dev, "POR reset is missing\n");
> +		return PTR_ERR(phy->por_rst);
> +	}
> +
> +	phy->srif_rst = devm_reset_control_get_optional(phy->dev, "srif_rst");
> +	if (IS_ERR(phy->srif_rst))
> +		return PTR_ERR(phy->srif_rst);
> +
> +	phy->phy = devm_phy_create(dev, NULL, match->data);
> +	if (IS_ERR(phy->phy)) {
> +		dev_err(dev, "failed to create PHY\n");
> +		return PTR_ERR(phy->phy);
> +	}
> +	phy_set_drvdata(phy->phy, phy);
> +
> +	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
> +
> +	return PTR_ERR_OR_ZERO(phy_provider);
> +}
> +
> +static struct platform_driver ipq4019_usb_phy_driver = {
> +	.probe	= ipq4019_usb_phy_probe,
> +	.driver = {
> +		.of_match_table	= ipq4019_usb_phy_of_match,
> +		.name  = "ipq4019-usb-phy",
> +	}
> +};
> +module_platform_driver(ipq4019_usb_phy_driver);
> +
> +MODULE_DESCRIPTION("QCOM/IPQ4019 USB phy driver");
> +MODULE_AUTHOR("John Crispin <john@phrozen.org>");
> +MODULE_LICENSE("GPL v2");
> -- 
> 2.24.1
> 

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 1/3] phy: add driver for Qualcomm IPQ40xx USB PHY
  2020-03-27 22:14 ` Bjorn Andersson
@ 2020-03-28 13:57   ` Robert Marko
  0 siblings, 0 replies; 10+ messages in thread
From: Robert Marko @ 2020-03-28 13:57 UTC (permalink / raw)
  To: Bjorn Andersson; +Cc: John Crispin, agross, linux-arm-msm, Luka Perkov

On Fri, Mar 27, 2020 at 11:14 PM Bjorn Andersson
<bjorn.andersson@linaro.org> wrote:
>
> On Mon 27 Jan 13:23 PST 2020, Robert Marko wrote:
>
> > From: John Crispin <john@phrozen.org>
> >
> > Add a driver to setup the USB phy on Qualcom Dakota SoCs.
> > The driver sets up HS and SS phys.
> >
> > Signed-off-by: John Crispin <john@phrozen.org>
> > Signed-off-by: Robert Marko <robert.marko@sartura.hr>
> > Cc: Luka Perkov <luka.perkov@sartura.hr>
>
> You didn't include any of the PHY or devicetree maintainers on your
> patches. Please resubmit them, with recipients as reported by
> scripts/get_maintainer.pl.
Sorry, I just sent it again to all of the maintainers.
>
> Thanks,
> Bjorn
>
> > ---
> > Changes from v2 to v3:
> > * Remove magic writes as they are not needed
> > * Correct commit message
> >
> >  drivers/phy/qualcomm/Kconfig                |   7 +
> >  drivers/phy/qualcomm/Makefile               |   1 +
> >  drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c | 152 ++++++++++++++++++++
> >  3 files changed, 160 insertions(+)
> >  create mode 100644 drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
> >
> > diff --git a/drivers/phy/qualcomm/Kconfig b/drivers/phy/qualcomm/Kconfig
> > index e46824da29f6..964bd5d784d2 100644
> > --- a/drivers/phy/qualcomm/Kconfig
> > +++ b/drivers/phy/qualcomm/Kconfig
> > @@ -18,6 +18,13 @@ config PHY_QCOM_APQ8064_SATA
> >       depends on OF
> >       select GENERIC_PHY
> >
> > +config PHY_QCOM_IPQ4019_USB
> > +     tristate "Qualcomm IPQ4019 USB PHY module"
> > +     depends on OF && ARCH_QCOM
> > +     select GENERIC_PHY
> > +     help
> > +       Support for the USB PHY on QCOM IPQ4019/Dakota chipsets.
> > +
> >  config PHY_QCOM_IPQ806X_SATA
> >       tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
> >       depends on ARCH_QCOM
> > diff --git a/drivers/phy/qualcomm/Makefile b/drivers/phy/qualcomm/Makefile
> > index 283251d6a5d9..8afe6c4f5178 100644
> > --- a/drivers/phy/qualcomm/Makefile
> > +++ b/drivers/phy/qualcomm/Makefile
> > @@ -1,6 +1,7 @@
> >  # SPDX-License-Identifier: GPL-2.0
> >  obj-$(CONFIG_PHY_ATH79_USB)          += phy-ath79-usb.o
> >  obj-$(CONFIG_PHY_QCOM_APQ8064_SATA)  += phy-qcom-apq8064-sata.o
> > +obj-$(CONFIG_PHY_QCOM_IPQ4019_USB)   += phy-qcom-ipq4019-usb.o
> >  obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA)  += phy-qcom-ipq806x-sata.o
> >  obj-$(CONFIG_PHY_QCOM_PCIE2)         += phy-qcom-pcie2.o
> >  obj-$(CONFIG_PHY_QCOM_QMP)           += phy-qcom-qmp.o
> > diff --git a/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c b/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
> > new file mode 100644
> > index 000000000000..7efebae6b6fd
> > --- /dev/null
> > +++ b/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
> > @@ -0,0 +1,152 @@
> > +// SPDX-License-Identifier: GPL-2.0-or-later
> > +/*
> > + * Copyright (C) 2018 John Crispin <john@phrozen.org>
> > + *
> > + * Based on code from
> > + * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
> > + *
> > + */
> > +
> > +#include <linux/delay.h>
> > +#include <linux/err.h>
> > +#include <linux/io.h>
> > +#include <linux/kernel.h>
> > +#include <linux/module.h>
> > +#include <linux/mutex.h>
> > +#include <linux/of_platform.h>
> > +#include <linux/phy/phy.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/reset.h>
> > +
> > +struct ipq4019_usb_phy {
> > +     struct device           *dev;
> > +     struct phy              *phy;
> > +     void __iomem            *base;
> > +     struct reset_control    *por_rst;
> > +     struct reset_control    *srif_rst;
> > +};
> > +
> > +static int ipq4019_ss_phy_power_off(struct phy *_phy)
> > +{
> > +     struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
> > +
> > +     reset_control_assert(phy->por_rst);
> > +     msleep(10);
> > +
> > +     return 0;
> > +}
> > +
> > +static int ipq4019_ss_phy_power_on(struct phy *_phy)
> > +{
> > +     struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
> > +
> > +     ipq4019_ss_phy_power_off(_phy);
> > +
> > +     reset_control_deassert(phy->por_rst);
> > +
> > +     return 0;
> > +}
> > +
> > +static struct phy_ops ipq4019_usb_ss_phy_ops = {
> > +     .power_on       = ipq4019_ss_phy_power_on,
> > +     .power_off      = ipq4019_ss_phy_power_off,
> > +};
> > +
> > +static int ipq4019_hs_phy_power_off(struct phy *_phy)
> > +{
> > +     struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
> > +
> > +     reset_control_assert(phy->por_rst);
> > +     msleep(10);
> > +
> > +     reset_control_assert(phy->srif_rst);
> > +     msleep(10);
> > +
> > +     return 0;
> > +}
> > +
> > +static int ipq4019_hs_phy_power_on(struct phy *_phy)
> > +{
> > +     struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
> > +
> > +     ipq4019_hs_phy_power_off(_phy);
> > +
> > +     reset_control_deassert(phy->srif_rst);
> > +     msleep(10);
> > +
> > +     reset_control_deassert(phy->por_rst);
> > +
> > +     return 0;
> > +}
> > +
> > +static struct phy_ops ipq4019_usb_hs_phy_ops = {
> > +     .power_on       = ipq4019_hs_phy_power_on,
> > +     .power_off      = ipq4019_hs_phy_power_off,
> > +};
> > +
> > +static const struct of_device_id ipq4019_usb_phy_of_match[] = {
> > +     { .compatible = "qcom,usb-hs-ipq4019-phy", .data = &ipq4019_usb_hs_phy_ops},
> > +     { .compatible = "qcom,usb-ss-ipq4019-phy", .data = &ipq4019_usb_ss_phy_ops},
> > +     { },
> > +};
> > +MODULE_DEVICE_TABLE(of, ipq4019_usb_phy_of_match);
> > +
> > +static int ipq4019_usb_phy_probe(struct platform_device *pdev)
> > +{
> > +     struct device *dev = &pdev->dev;
> > +     struct resource *res;
> > +     struct phy_provider *phy_provider;
> > +     struct ipq4019_usb_phy *phy;
> > +     const struct of_device_id *match;
> > +
> > +     match = of_match_device(ipq4019_usb_phy_of_match, &pdev->dev);
> > +     if (!match)
> > +             return -ENODEV;
> > +
> > +     phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
> > +     if (!phy)
> > +             return -ENOMEM;
> > +
> > +     phy->dev = &pdev->dev;
> > +     res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > +     phy->base = devm_ioremap_resource(&pdev->dev, res);
> > +     if (IS_ERR(phy->base)) {
> > +             dev_err(dev, "failed to remap register memory\n");
> > +             return PTR_ERR(phy->base);
> > +     }
> > +
> > +     phy->por_rst = devm_reset_control_get(phy->dev, "por_rst");
> > +     if (IS_ERR(phy->por_rst)) {
> > +             if (PTR_ERR(phy->por_rst) != -EPROBE_DEFER)
> > +                     dev_err(dev, "POR reset is missing\n");
> > +             return PTR_ERR(phy->por_rst);
> > +     }
> > +
> > +     phy->srif_rst = devm_reset_control_get_optional(phy->dev, "srif_rst");
> > +     if (IS_ERR(phy->srif_rst))
> > +             return PTR_ERR(phy->srif_rst);
> > +
> > +     phy->phy = devm_phy_create(dev, NULL, match->data);
> > +     if (IS_ERR(phy->phy)) {
> > +             dev_err(dev, "failed to create PHY\n");
> > +             return PTR_ERR(phy->phy);
> > +     }
> > +     phy_set_drvdata(phy->phy, phy);
> > +
> > +     phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
> > +
> > +     return PTR_ERR_OR_ZERO(phy_provider);
> > +}
> > +
> > +static struct platform_driver ipq4019_usb_phy_driver = {
> > +     .probe  = ipq4019_usb_phy_probe,
> > +     .driver = {
> > +             .of_match_table = ipq4019_usb_phy_of_match,
> > +             .name  = "ipq4019-usb-phy",
> > +     }
> > +};
> > +module_platform_driver(ipq4019_usb_phy_driver);
> > +
> > +MODULE_DESCRIPTION("QCOM/IPQ4019 USB phy driver");
> > +MODULE_AUTHOR("John Crispin <john@phrozen.org>");
> > +MODULE_LICENSE("GPL v2");
> > --
> > 2.24.1
> >

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v3 3/3] ARM: dts: qcom: ipq4019: add USB devicetree nodes
  2020-03-27 22:12   ` Bjorn Andersson
@ 2020-03-28 13:58     ` Robert Marko
  0 siblings, 0 replies; 10+ messages in thread
From: Robert Marko @ 2020-03-28 13:58 UTC (permalink / raw)
  To: Bjorn Andersson; +Cc: John Crispin, agross, linux-arm-msm, Luka Perkov

On Fri, Mar 27, 2020 at 11:12 PM Bjorn Andersson
<bjorn.andersson@linaro.org> wrote:
>
> On Mon 27 Jan 13:23 PST 2020, Robert Marko wrote:
>
> > From: John Crispin <john@phrozen.org>
> >
> > Since we now have driver for the USB PHY, lets add the necessary nodes to DTSI.
> >
> > Signed-off-by: John Crispin <john@phrozen.org>
> > Tested-by: Robert Marko <robert.marko@sartura.hr>
> > Cc: Luka Perkov <luka.perkov@sartura.hr>
>
> Robert, I'm missing your Signed-off-by here (and I would like Kishon to
> take the PHY before merging this).
Solved in v4.
Thanks
>
> Regards,
> Bjorn
>
> > ---
> >  arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 20 +++++
> >  arch/arm/boot/dts/qcom-ipq4019.dtsi           | 74 +++++++++++++++++++
> >  2 files changed, 94 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
> > index 418f9a022336..2ee5f05d5a43 100644
> > --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
> > +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
> > @@ -109,5 +109,25 @@
> >               wifi@a800000 {
> >                       status = "ok";
> >               };
> > +
> > +             usb3_ss_phy: ssphy@9a000 {
> > +                     status = "ok";
> > +             };
> > +
> > +             usb3_hs_phy: hsphy@a6000 {
> > +                     status = "ok";
> > +             };
> > +
> > +             usb3: usb3@8af8800 {
> > +                     status = "ok";
> > +             };
> > +
> > +             usb2_hs_phy: hsphy@a8000 {
> > +                     status = "ok";
> > +             };
> > +
> > +             usb2: usb2@60f8800 {
> > +                     status = "ok";
> > +             };
> >       };
> >  };
> > diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
> > index b6e5203a210b..18e9c639514c 100644
> > --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
> > +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
> > @@ -564,5 +564,79 @@
> >                                         "legacy";
> >                       status = "disabled";
> >               };
> > +
> > +             usb3_ss_phy: ssphy@9a000 {
> > +                     compatible = "qcom,usb-ss-ipq4019-phy";
> > +                     #phy-cells = <0>;
> > +                     reg = <0x9a000 0x800>;
> > +                     reg-names = "phy_base";
> > +                     resets = <&gcc USB3_UNIPHY_PHY_ARES>;
> > +                     reset-names = "por_rst";
> > +                     status = "disabled";
> > +             };
> > +
> > +             usb3_hs_phy: hsphy@a6000 {
> > +                     compatible = "qcom,usb-hs-ipq4019-phy";
> > +                     #phy-cells = <0>;
> > +                     reg = <0xa6000 0x40>;
> > +                     reg-names = "phy_base";
> > +                     resets = <&gcc USB3_HSPHY_POR_ARES>, <&gcc USB3_HSPHY_S_ARES>;
> > +                     reset-names = "por_rst", "srif_rst";
> > +                     status = "disabled";
> > +             };
> > +
> > +             usb3@8af8800 {
> > +                     compatible = "qcom,dwc3";
> > +                     reg = <0x8af8800 0x100>;
> > +                     #address-cells = <1>;
> > +                     #size-cells = <1>;
> > +                     clocks = <&gcc GCC_USB3_MASTER_CLK>,
> > +                              <&gcc GCC_USB3_SLEEP_CLK>,
> > +                              <&gcc GCC_USB3_MOCK_UTMI_CLK>;
> > +                     clock-names = "master", "sleep", "mock_utmi";
> > +                     ranges;
> > +                     status = "disabled";
> > +
> > +                     dwc3@8a00000 {
> > +                             compatible = "snps,dwc3";
> > +                             reg = <0x8a00000 0xf8000>;
> > +                             interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
> > +                             phys = <&usb3_hs_phy>, <&usb3_ss_phy>;
> > +                             phy-names = "usb2-phy", "usb3-phy";
> > +                             dr_mode = "host";
> > +                     };
> > +             };
> > +
> > +             usb2_hs_phy: hsphy@a8000 {
> > +                     compatible = "qcom,usb-hs-ipq4019-phy";
> > +                     #phy-cells = <0>;
> > +                     reg = <0xa8000 0x40>;
> > +                     reg-names = "phy_base";
> > +                     resets = <&gcc USB2_HSPHY_POR_ARES>, <&gcc USB2_HSPHY_S_ARES>;
> > +                     reset-names = "por_rst", "srif_rst";
> > +                     status = "disabled";
> > +             };
> > +
> > +             usb2@60f8800 {
> > +                     compatible = "qcom,dwc3";
> > +                     reg = <0x60f8800 0x100>;
> > +                     #address-cells = <1>;
> > +                     #size-cells = <1>;
> > +                     clocks = <&gcc GCC_USB2_MASTER_CLK>,
> > +                              <&gcc GCC_USB2_SLEEP_CLK>,
> > +                              <&gcc GCC_USB2_MOCK_UTMI_CLK>;
> > +                     clock-names = "master", "sleep", "mock_utmi";
> > +                     ranges;
> > +                     status = "disabled";
> > +
> > +                     dwc3@6000000 {
> > +                             compatible = "snps,dwc3";
> > +                             reg = <0x6000000 0xf8000>;
> > +                             interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
> > +                             phys = <&usb2_hs_phy>;
> > +                             phy-names = "usb2-phy";
> > +                             dr_mode = "host";
> > +                     };
> > +             };
> >       };
> >  };
> > --
> > 2.24.1
> >

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, back to index

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-01-27 21:23 [PATCH v3 1/3] phy: add driver for Qualcomm IPQ40xx USB PHY Robert Marko
2020-01-27 21:23 ` [PATCH v3 2/3] dt-bindings: phy-qcom-ipq4019-usb: add binding document Robert Marko
2020-01-27 21:23 ` [PATCH v3 3/3] ARM: dts: qcom: ipq4019: add USB devicetree nodes Robert Marko
2020-03-27 22:12   ` Bjorn Andersson
2020-03-28 13:58     ` Robert Marko
2020-03-08 18:55 ` [PATCH v3 1/3] phy: add driver for Qualcomm IPQ40xx USB PHY Robert Marko
2020-03-25 10:24 ` Robert Marko
2020-03-25 10:45   ` John Crispin
2020-03-27 22:14 ` Bjorn Andersson
2020-03-28 13:57   ` Robert Marko

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