From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C464C433E1 for ; Wed, 12 Aug 2020 09:26:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 33CF42083B for ; Wed, 12 Aug 2020 09:26:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="d20ue8ZG" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727881AbgHLJ01 (ORCPT ); Wed, 12 Aug 2020 05:26:27 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:58853 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727065AbgHLJ01 (ORCPT ); Wed, 12 Aug 2020 05:26:27 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1597224385; h=Content-Transfer-Encoding: Content-Type: In-Reply-To: MIME-Version: Date: Message-ID: References: Cc: To: From: Subject: Sender; bh=Ut7UsXyyt3w1ZkSYeaLSTk9Ej6vXqnbWm3dpszGQbYk=; b=d20ue8ZG+WnVsgznsTyLSMkrNVmrN1V0RWSyg4BGAZaSVelC/JqE1l1oPQYl4fMcP7yaXcpG O1yzklwDHur+sJf1WOxIsi8m2epuw1YGbv8FyM6oWE95msaN3oC3jINQlupT6V7MEda3679e AKYhoWosGDgy3YYA5TAXPSQ0k9g= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n13.prod.us-east-1.postgun.com with SMTP id 5f33b5c1247ccc308cb55ffd (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Wed, 12 Aug 2020 09:26:25 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 9D184C433A0; Wed, 12 Aug 2020 09:26:24 +0000 (UTC) Received: from [192.168.1.16] (unknown [61.1.229.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak) by smtp.codeaurora.org (Postfix) with ESMTPSA id B0A60C433CA; Wed, 12 Aug 2020 09:26:19 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org B0A60C433CA Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org Subject: Re: [RFC v2 03/11] tty: serial: qcom_geni_serial: Use OPP API to set clk/perf state From: Rajendra Nayak To: Amit Pundir Cc: John Stultz , lkml , Ulf Hansson , linux-scsi@vger.kernel.org, Linux PM list , linux-arm-msm , "Rafael J. Wysocki" , Doug Anderson , dri-devel , linux-spi@vger.kernel.org, linux-serial@vger.kernel.org, Viresh Kumar , Stephen Boyd , Bjorn Andersson References: <20190320094918.20234-1-rnayak@codeaurora.org> <20190320094918.20234-4-rnayak@codeaurora.org> Message-ID: Date: Wed, 12 Aug 2020 14:56:17 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 8/12/2020 1:09 PM, Rajendra Nayak wrote: > > On 8/12/2020 1:05 PM, Amit Pundir wrote: >> Hi Rajendra, >> >> On Wed, 12 Aug 2020 at 11:18, Rajendra Nayak wrote: >>> >>> >>> On 8/12/2020 7:03 AM, John Stultz wrote: >>>> On Tue, Aug 11, 2020 at 4:11 PM John Stultz wrote: >>>>> >>>>> On Wed, Mar 20, 2019 at 2:49 AM Rajendra Nayak wrote: >>>>>> >>>>>> geni serial needs to express a perforamnce state requirement on CX >>>>>> depending on the frequency of the clock rates. Use OPP table from >>>>>> DT to register with OPP framework and use dev_pm_opp_set_rate() to >>>>>> set the clk/perf state. >>>>>> >>>>>> Signed-off-by: Rajendra Nayak >>>>>> Signed-off-by: Stephen Boyd >>>>>> --- >>>>>>    drivers/tty/serial/qcom_geni_serial.c | 15 +++++++++++++-- >>>>>>    1 file changed, 13 insertions(+), 2 deletions(-) >>>>>> >>>>> >>>>> Hey, >>>>>     I just wanted to follow up on this patch, as I've bisected it >>>>> (a5819b548af0) down as having broken qca bluetooth on the Dragonboard >>>>> 845c. >>>>> >>>>> I haven't yet had time to debug it yet, but wanted to raise the issue >>>>> in case anyone else has seen similar trouble. >>>> >>>> So I dug in a bit further, and this chunk seems to be causing the issue: >>>>> @@ -961,7 +963,7 @@ static void qcom_geni_serial_set_termios(struct uart_port *uport, >>>>>                   goto out_restart_rx; >>>>> >>>>>           uport->uartclk = clk_rate; >>>>> -       clk_set_rate(port->se.clk, clk_rate); >>>>> +       dev_pm_opp_set_rate(port->dev, clk_rate); >>>>>           ser_clk_cfg = SER_CLK_EN; >>>>>           ser_clk_cfg |= clk_div << CLK_DIV_SHFT; >>>>> >>>> >>>> >>>> With that applied, I see the following errors in dmesg and bluetooth >>>> fails to function: >>>> [    4.763467] qcom_geni_serial 898000.serial: dev_pm_opp_set_rate: >>>> failed to find OPP for freq 102400000 (-34) >>>> [    4.773493] qcom_geni_serial 898000.serial: dev_pm_opp_set_rate: >>>> failed to find OPP for freq 102400000 (-34) >>>> >>>> With just that chunk reverted on linus/HEAD, bluetooth seems to work ok. >>> >>> This seems like the same issue that was also reported on venus [1] because the >>> clock frequency tables apparently don;t exactly match the achievable clock >>> frequencies (which we also used to construct the OPP tables) >>> >>> Can you try updating the OPP table for QUP to have 102400000 instead of the >>> current 100000000 and see if that fixes it? >> >> That worked. Thanks. >> >> Should this change be common to base sdm845.dtsi or platform specific dts? >> For what it's worth, we see this BT breakage on PocoF1 phone too. > > Thanks for confirming, it will have to be part of the SoC dtsi, and I am > guessing a similar change is perhaps also needed on sc7180. > I will send a patch out to fix the OPP tables for both. I spent some more time looking at this and it does not look like this is the rounding issues with clock FMAX tables. I had these tables picked from downstream clock code and it turns out these tables were reworked at clock init based on the silicon rev, so I need to fix up the OPP tables accordingly which will add a new OPP entry for 102.4Mhz. I'll post a patch shortly. > >> >> Regards, >> Amit Pundir >> >> >>> >>> [1] https://lkml.org/lkml/2020/7/27/507 >>> >>>> >>>> thanks >>>> -john >>>> >>> >>> -- >>> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member >>> of Code Aurora Forum, hosted by The Linux Foundation > -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation