From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
mathieu.poirier@linaro.org, leo.yan@linaro.org,
alexander.shishkin@linux.intel.com, david.brown@linaro.org,
mark.rutland@arm.com
Cc: rnayak@codeaurora.org, vivek.gautam@codeaurora.org,
sibis@codeaurora.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org
Subject: Re: [PATCH 2/2] coresight: Abort probe for missing CPU phandle
Date: Thu, 20 Jun 2019 21:40:13 +0530 [thread overview]
Message-ID: <ff99f1b5-7a04-a11a-7bbc-1a6a68908113@codeaurora.org> (raw)
In-Reply-To: <0182216b-5495-bcf7-bb0e-869133b24830@arm.com>
On 6/20/2019 8:53 PM, Suzuki K Poulose wrote:
>
>
>
> Please wait for Mathieu's thoughts on it. And in general I would wait
> for feedback from the people in a version, before posting another one,
> to reduce the number of respins.
>
Mathieu already said he was OK in the other thread, but I will wait for
some more feedbacks.
Thanks,
Sai
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2019-06-20 16:10 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-20 13:45 [PATCH 0/2] coresight: Set affinity to invalid for missing CPU phandle Sai Prakash Ranjan
2019-06-20 13:45 ` [PATCH 1/2] " Sai Prakash Ranjan
2019-06-20 13:55 ` Suzuki K Poulose
2019-06-20 14:54 ` Sai Prakash Ranjan
2019-06-20 17:39 ` Mathieu Poirier
2019-06-20 18:05 ` Sai Prakash Ranjan
2019-06-20 13:45 ` [PATCH 2/2] coresight: Abort probe " Sai Prakash Ranjan
2019-06-20 13:58 ` Suzuki K Poulose
2019-06-20 14:55 ` Sai Prakash Ranjan
2019-06-20 15:23 ` Suzuki K Poulose
2019-06-20 16:10 ` Sai Prakash Ranjan [this message]
2019-06-20 17:43 ` Mathieu Poirier
2019-06-20 18:07 ` Sai Prakash Ranjan
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