From: Marijn Suijten <marijn.suijten@somainline.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
Abhinav Kumar <quic_abhinavk@quicinc.com>,
Stephen Boyd <swboyd@chromium.org>,
David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
Bjorn Andersson <andersson@kernel.org>,
linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org
Subject: Re: [PATCH v2 8/8] drm/msm/dpu: move INTF tearing checks to dpu_encoder_phys_cmd_init
Date: Sun, 30 Jul 2023 21:52:28 +0200 [thread overview]
Message-ID: <iicue6zvfcv5jhwhemivl7fjjiil6w7a74owafrztqlc4eakzp@fao3dzsil2tf> (raw)
In-Reply-To: <20230730003518.349197-9-dmitry.baryshkov@linaro.org>
On 2023-07-30 03:35:18, Dmitry Baryshkov wrote:
> As the INTF is fixed at the encoder creation time, we can move the
> check whether INTF supports tearchck to dpu_encoder_phys_cmd_init().
> This function can return an error if INTF doesn't have required feature.
> Performing this check in dpu_encoder_phys_cmd_tearcheck_config() is less
> useful, as this function returns void.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> .../drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 41 +++++++++++--------
> 1 file changed, 25 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> index 012986cff38c..adbd559a5290 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> @@ -325,24 +325,21 @@ static void dpu_encoder_phys_cmd_tearcheck_config(
> unsigned long vsync_hz;
> struct dpu_kms *dpu_kms;
>
> - if (phys_enc->has_intf_te) {
> - if (!phys_enc->hw_intf ||
> - !phys_enc->hw_intf->ops.enable_tearcheck) {
> - DPU_DEBUG_CMDENC(cmd_enc, "tearcheck not supported\n");
> - return;
> - }
> -
> - DPU_DEBUG_CMDENC(cmd_enc, "");
> - } else {
> - if (!phys_enc->hw_pp ||
> - !phys_enc->hw_pp->ops.enable_tearcheck) {
> - DPU_DEBUG_CMDENC(cmd_enc, "tearcheck not supported\n");
> - return;
> - }
> -
> - DPU_DEBUG_CMDENC(cmd_enc, "pp %d\n", phys_enc->hw_pp->idx - PINGPONG_0);
> + /*
> + * TODO: if/when resource allocation is refactored, move this to a
> + * place where the driver can actually return an error.
> + */
> + if (!phys_enc->has_intf_te &&
> + (!phys_enc->hw_pp ||
> + !phys_enc->hw_pp->ops.enable_tearcheck)) {
We're probably overdoing it here if I request a WARN_ON when has_intf_te
is true while enable_tearcheck is also non-NULL?
> + DPU_DEBUG_CMDENC(cmd_enc, "tearcheck not supported\n");
> + return;
> }
>
> + DPU_DEBUG_CMDENC(cmd_enc, "intf %d pp %d\n",
> + phys_enc->hw_intf->idx - INTF_0,
> + phys_enc->hw_pp->idx - PINGPONG_0);
Note that hw_pp wasn't printed when has_intf_te is true. And it doesn't
seem like that pointer is dereferenced anywhere in that case, perhaps
hw_pp may even be NULL within dpu_encoder_phys_cmd_tearcheck_config() at
some point.
> +
> mode = &phys_enc->cached_mode;
>
> dpu_kms = phys_enc->dpu_kms;
> @@ -768,10 +765,22 @@ struct dpu_encoder_phys *dpu_encoder_phys_cmd_init(
> phys_enc->intf_mode = INTF_MODE_CMD;
> cmd_enc->stream_sel = 0;
>
> + if (!phys_enc->hw_intf) {
> + DPU_ERROR_CMDENC(cmd_enc, "no INTF provided\n");
> +
No need for this newline?
> + return ERR_PTR(-EINVAL);
> + }
> +
> /* DPU before 5.0 use PINGPONG for TE handling */
> if (phys_enc->dpu_kms->catalog->mdss_ver->core_major_ver >= 5)
> phys_enc->has_intf_te = true;
>
> + if (phys_enc->has_intf_te && !phys_enc->hw_intf->ops.enable_tearcheck) {
> + DPU_ERROR_CMDENC(cmd_enc, "tearcheck not supported\n");
> +
Same here?
- Marijn
> + return ERR_PTR(-EINVAL);
> + }
> +
> atomic_set(&cmd_enc->pending_vblank_cnt, 0);
> init_waitqueue_head(&cmd_enc->pending_vblank_wq);
>
> --
> 2.39.2
>
next prev parent reply other threads:[~2023-07-30 19:52 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-30 0:35 [PATCH v2 0/8] drm/msm/dpu: drop DPU_INTF_TE and DPU_PINGPONG_TE Dmitry Baryshkov
2023-07-30 0:35 ` [PATCH v2 1/8] drm/msm/dpu: inline _setup_pingpong_ops() Dmitry Baryshkov
2023-07-30 19:41 ` Marijn Suijten
2023-07-30 0:35 ` [PATCH v2 2/8] drm/msm/dpu: enable PINGPONG TE operations only when supported by HW Dmitry Baryshkov
2023-07-30 19:45 ` Marijn Suijten
2023-07-30 0:35 ` [PATCH v2 3/8] drm/msm/dpu: drop the DPU_PINGPONG_TE flag Dmitry Baryshkov
2023-07-30 0:35 ` [PATCH v2 4/8] drm/msm/dpu: inline _setup_intf_ops() Dmitry Baryshkov
2023-07-30 0:35 ` [PATCH v2 5/8] drm/msm/dpu: enable INTF TE operations only when supported by HW Dmitry Baryshkov
2023-07-30 0:35 ` [PATCH v2 6/8] drm/msm/dpu: drop DPU_INTF_TE feature flag Dmitry Baryshkov
2023-07-30 0:35 ` [PATCH v2 7/8] drm/msm/dpu: drop useless check from dpu_encoder_phys_cmd_te_rd_ptr_irq() Dmitry Baryshkov
2023-07-30 0:35 ` [PATCH v2 8/8] drm/msm/dpu: move INTF tearing checks to dpu_encoder_phys_cmd_init Dmitry Baryshkov
2023-07-30 19:52 ` Marijn Suijten [this message]
2023-07-30 19:56 ` Dmitry Baryshkov
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