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Tue, 11 May 2021 10:40:41 +0000 From: Avri Altman To: Ulf Hansson , "linux-mmc@vger.kernel.org" , Adrian Hunter CC: Linus Walleij , Wolfram Sang , Shawn Lin , Masami Hiramatsu , "linux-block@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: RE: [PATCH v2] mmc: core: Add support for cache ctrl for SD cards Thread-Topic: [PATCH v2] mmc: core: Add support for cache ctrl for SD cards Thread-Index: AQHXRk5iDCVW9pafXEqO5n4u03P0lareFyjA Date: Tue, 11 May 2021 10:40:41 +0000 Message-ID: References: <20210511101359.83521-1-ulf.hansson@linaro.org> In-Reply-To: <20210511101359.83521-1-ulf.hansson@linaro.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: linaro.org; dkim=none (message not signed) header.d=none;linaro.org; dmarc=none action=none header.from=wdc.com; x-originating-ip: [212.25.79.133] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 3ba9a2ea-9e47-4ded-c6e3-08d914693963 x-ms-traffictypediagnostic: DM6PR04MB5946: x-microsoft-antispam-prvs: wdcipoutbound: EOP-TRUE x-ms-oob-tlc-oobclassifiers: OLM:800; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR04MB6575.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3ba9a2ea-9e47-4ded-c6e3-08d914693963 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 May 2021 10:40:41.5129 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 1++FKRLpngZRmCrJRuGp1a/hj2F39DjrrbT8InlwLFye/YH6KZaR/A7KdLESUOo7X+sY8ggzDkFLYWOA9YHR/g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR04MB5946 Precedence: bulk List-ID: X-Mailing-List: linux-block@vger.kernel.org > In SD spec v6.x the SD function extension registers for performance > enhancements were introduced. As a part of this an optional internal cach= e > on the SD card, can be used to improve performance. >=20 > The let the SD card use the cache, the host needs to enable it and manage > flushing of the cache, so let's add support for this. >=20 > Note that for an SD card supporting the cache it's mandatory for it, to > also support the poweroff notification feature. According to the SD spec, > if the cache has been enabled and a poweroff notification is sent to the > card, that implicitly also means that the card should flush its internal > cache. Therefore, dealing with cache flushing for REQ_OP_FLUSH block > requests is sufficient. >=20 > Reviewed-by: Linus Walleij > Signed-off-by: Ulf Hansson Reviewed-by: Avri Altman > --- >=20 > Changes in v2: > - Converted to use the BIT() macro for clarification, as suggested by Li= nus. > - Reset SD_EXT_PERF_CACHE bit when cache enable fails, as suggested by > Avri. >=20 > Note that: > - I decided to keep the error path when failing to enable the cache. It'= s > seems more robust, as it's unclear what happens with the SD card at failu= re. > Additionally, if improvements are needed we can make it on top. >=20 > --- > drivers/mmc/core/mmc_ops.c | 1 + > drivers/mmc/core/mmc_ops.h | 1 + > drivers/mmc/core/sd.c | 100 > +++++++++++++++++++++++++++++++++++++ > include/linux/mmc/card.h | 1 + > 4 files changed, 103 insertions(+) >=20 > diff --git a/drivers/mmc/core/mmc_ops.c b/drivers/mmc/core/mmc_ops.c > index af423acc4c88..3c58f6d0f482 100644 > --- a/drivers/mmc/core/mmc_ops.c > +++ b/drivers/mmc/core/mmc_ops.c > @@ -456,6 +456,7 @@ static int mmc_busy_cb(void *cb_data, bool *busy) > err =3D R1_STATUS(status) ? -EIO : 0; > break; > case MMC_BUSY_HPI: > + case MMC_BUSY_EXTR_SINGLE: > break; > default: > err =3D -EINVAL; > diff --git a/drivers/mmc/core/mmc_ops.h b/drivers/mmc/core/mmc_ops.h > index c3c1d9c2577e..41ab4f573a31 100644 > --- a/drivers/mmc/core/mmc_ops.h > +++ b/drivers/mmc/core/mmc_ops.h > @@ -14,6 +14,7 @@ enum mmc_busy_cmd { > MMC_BUSY_CMD6, > MMC_BUSY_ERASE, > MMC_BUSY_HPI, > + MMC_BUSY_EXTR_SINGLE, > }; >=20 > struct mmc_host; > diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c > index bd40c682d264..781c1e24308c 100644 > --- a/drivers/mmc/core/sd.c > +++ b/drivers/mmc/core/sd.c > @@ -67,6 +67,7 @@ static const unsigned int sd_au_size[] =3D { > }) >=20 > #define SD_POWEROFF_NOTIFY_TIMEOUT_MS 2000 > +#define SD_WRITE_EXTR_SINGLE_TIMEOUT_MS 1000 >=20 > struct sd_busy_data { > struct mmc_card *card; > @@ -1287,6 +1288,96 @@ static int sd_read_ext_regs(struct mmc_card > *card) > return err; > } >=20 > +static bool sd_cache_enabled(struct mmc_host *host) > +{ > + return host->card->ext_perf.feature_enabled & SD_EXT_PERF_CACHE; > +} > + > +static int sd_flush_cache(struct mmc_host *host) > +{ > + struct mmc_card *card =3D host->card; > + u8 *reg_buf, fno, page; > + u16 offset; > + int err; > + > + if (!sd_cache_enabled(host)) > + return 0; > + > + reg_buf =3D kzalloc(512, GFP_KERNEL); > + if (!reg_buf) > + return -ENOMEM; > + > + /* > + * Set Flush Cache at bit 0 in the performance enhancement regist= er at > + * 261 bytes offset. > + */ > + fno =3D card->ext_perf.fno; > + page =3D card->ext_perf.page; > + offset =3D card->ext_perf.offset + 261; > + > + err =3D sd_write_ext_reg(card, fno, page, offset, BIT(0)); > + if (err) { > + pr_warn("%s: error %d writing Cache Flush bit\n", > + mmc_hostname(host), err); > + goto out; > + } > + > + err =3D mmc_poll_for_busy(card, > SD_WRITE_EXTR_SINGLE_TIMEOUT_MS, false, > + MMC_BUSY_EXTR_SINGLE); > + if (err) > + goto out; > + > + /* > + * Read the Flush Cache bit. The card shall reset it, to confirm = that > + * it's has completed the flushing of the cache. > + */ > + err =3D sd_read_ext_reg(card, fno, page, offset, 1, reg_buf); > + if (err) { > + pr_warn("%s: error %d reading Cache Flush bit\n", > + mmc_hostname(host), err); > + goto out; > + } > + > + if (reg_buf[0] & BIT(0)) > + err =3D -ETIMEDOUT; > +out: > + kfree(reg_buf); > + return err; > +} > + > +static int sd_enable_cache(struct mmc_card *card) > +{ > + u8 *reg_buf; > + int err; > + > + card->ext_perf.feature_enabled &=3D ~SD_EXT_PERF_CACHE; > + > + reg_buf =3D kzalloc(512, GFP_KERNEL); > + if (!reg_buf) > + return -ENOMEM; > + > + /* > + * Set Cache Enable at bit 0 in the performance enhancement regis= ter at > + * 260 bytes offset. > + */ > + err =3D sd_write_ext_reg(card, card->ext_perf.fno, card->ext_perf= .page, > + card->ext_perf.offset + 260, BIT(0)); > + if (err) { > + pr_warn("%s: error %d writing Cache Enable bit\n", > + mmc_hostname(card->host), err); > + goto out; > + } > + > + err =3D mmc_poll_for_busy(card, > SD_WRITE_EXTR_SINGLE_TIMEOUT_MS, false, > + MMC_BUSY_EXTR_SINGLE); > + if (!err) > + card->ext_perf.feature_enabled |=3D SD_EXT_PERF_CACHE; > + > +out: > + kfree(reg_buf); > + return err; > +} > + > /* > * Handle the detection and initialisation of a card. > * > @@ -1442,6 +1533,13 @@ static int mmc_sd_init_card(struct mmc_host > *host, u32 ocr, > goto free_card; > } >=20 > + /* Enable internal SD cache if supported. */ > + if (card->ext_perf.feature_support & SD_EXT_PERF_CACHE) { > + err =3D sd_enable_cache(card); > + if (err) > + goto free_card; > + } > + > if (host->cqe_ops && !host->cqe_enabled) { > err =3D host->cqe_ops->cqe_enable(host, card); > if (!err) { > @@ -1694,6 +1792,8 @@ static const struct mmc_bus_ops mmc_sd_ops =3D { > .alive =3D mmc_sd_alive, > .shutdown =3D mmc_sd_suspend, > .hw_reset =3D mmc_sd_hw_reset, > + .cache_enabled =3D sd_cache_enabled, > + .flush_cache =3D sd_flush_cache, > }; >=20 > /* > diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h > index 2867af0635f8..74e6c0624d27 100644 > --- a/include/linux/mmc/card.h > +++ b/include/linux/mmc/card.h > @@ -196,6 +196,7 @@ struct sd_ext_reg { > u8 page; > u16 offset; > u8 rev; > + u8 feature_enabled; > u8 feature_support; > /* Power Management Function. */ > #define SD_EXT_POWER_OFF_NOTIFY (1<<0) > -- > 2.25.1