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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id e22sm3072636otq.5.2021.08.10.09.03.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Aug 2021 09:03:15 -0700 (PDT) Date: Tue, 10 Aug 2021 11:03:12 -0500 From: Bjorn Andersson To: Ulf Hansson Cc: Rob Herring , Dmitry Baryshkov , Peter Chen , Mark Brown , Andy Gross , Liam Girdwood , Marcel Holtmann , Johan Hedberg , Luiz Augusto von Dentz , linux-arm-msm , Manivannan Sadhasivam , DTML , Linux Kernel Mailing List , linux-bluetooth@vger.kernel.org Subject: Re: [PATCH v3 2/7] regulator: qca6390: add support for QCA639x powerup sequence Message-ID: References: <20210621223141.1638189-1-dmitry.baryshkov@linaro.org> <20210621223141.1638189-3-dmitry.baryshkov@linaro.org> <20210706115517.GB4529@sirena.org.uk> <20210714164710.GC2719790@robh.at.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-bluetooth@vger.kernel.org On Tue 10 Aug 06:55 CDT 2021, Ulf Hansson wrote: > On Wed, 14 Jul 2021 at 18:47, Rob Herring wrote: > > > > On Thu, Jul 08, 2021 at 02:37:44PM +0300, Dmitry Baryshkov wrote: > > > Hi, > > > > > > On Thu, 8 Jul 2021 at 13:10, Ulf Hansson wrote: > > > > > > > > - Peter (the email was bouncing) > > > > > > + Peter's kernel.org address > > > > > > > > > > > On Tue, 6 Jul 2021 at 13:55, Mark Brown wrote: > > > > > > > > > > On Tue, Jul 06, 2021 at 09:54:03AM +0200, Ulf Hansson wrote: > > > > > > On Tue, 22 Jun 2021 at 00:32, Dmitry Baryshkov > > > > > > > > > > > > Qualcomm QCA6390/1 is a family of WiFi + Bluetooth SoCs, with BT part > > > > > > > being controlled through the UART and WiFi being present on PCIe > > > > > > > bus. Both blocks share common power sources. Add device driver handling > > > > > > > power sequencing of QCA6390/1. > > > > > > > > > > > Power sequencing of discoverable buses have been discussed several > > > > > > times before at LKML. The last attempt [1] I am aware of, was in 2017 > > > > > > from Peter Chen. I don't think there is a common solution, yet. > > > > > > > > > > This feels a bit different to the power sequencing problem - it's not > > > > > exposing the individual inputs to the device but rather is a block that > > > > > manages everything but needs a bit of a kick to get things going (I'd > > > > > guess that with ACPI it'd be triggered via AML). It's in the same space > > > > > but it's not quite the same issue I think, something that can handle > > > > > control of the individual resources might still struggle with this. > > > > > > > > Well, to me it looks very similar to those resouses we could manage > > > > with the mmc pwrseq, for SDIO. It's also typically the same kind of > > > > combo-chips that moved from supporting SDIO to PCIe, for improved > > > > performance I guess. More importantly, the same constraint to > > > > pre-power on the device is needed to allow it to be discovered/probed. > > > > > > In our case we'd definitely use pwrseq for PCIe bus and we can also > > > benefit from using pwrseq for serdev and for platform busses also (for > > > the same story of WiFi+BT chips). > > > > > > I can take a look at rewriting pwrseq code to also handle the PCIe > > > bus. Rewriting it to be a generic lib seems like an easy task, > > > plugging it into PCIe code would be more fun. > > > > > > Platform and serdev... Definitely even more fun. > > > > I don't want to see pwrseq (the binding) expanded to other buses. If > > that was the answer, we wouldn't be having this discussion. It was a > > mistake for MMC IMO. > > Let's make sure we get your point correctly. I think we have discussed > this in the past, but let's refresh our memories. > > If I recall correctly, you are against the mmc pwrseq DT bindings > because we are using a separate pwrseq OF node, that we point to via a > "mmc-pwrseq" property that contains a phandle from the mmc controller > device node. Is that correct? > > If we would have encoded the power sequence specific properties, from > within a child node for the mmc controller node, that would have been > okay for you, right? > In Dmitry's case, we have an external chip with that needs to be powered on per a specific sequence, at which point the WiFi driver on PCIe and BT driver on serdev will be able to communicate with the device. The extended case of this is where we have an SDX55 modem soldered onto the pcb next to the SoC, in which case the power sequencing is even more complex and additionally there are incoming gpios used to detect things such as the firmware of the modem has crashed and Linux needs to toggle power and rescan the PCIe bus. In both of these cases it seems quite reasonable to represent that external chip (and it's power needs) as a separate DT node. But we need a way to link the functional devices to that thing. Regards, Bjorn > > > > If pwrseq works as a kernel library/api, then I have no issue with that. > > That's what Peter Chen was trying to do. A generic interface, flexible > enough so it can be used for many similar configurations (but not > exactly the same). > > Perhaps it was too generic though. > > > > > > > > > > Therefore, I think it would be worth having a common solution for > > > > this, rather than a solution per subsystem or even worse, per device. > > > > Power sequencing requirements are inheritently per device unless we're > > talking about standard connectors. > > The requirements are certainly per device, but the way to manage them > doesn't have to be. > > As you said above, a generic library that subsystems/drivers can call > to power on/off a discoverable device, before trying to probe it would > be a good start. > > > > > This is a solved problem on MDIO. It's quite simple. If there's a DT > > node for a device you haven't discovered, then probe it anyways. > > A child OF node? > > Then what do you think about some common power sequence properties > that we can use in such node? > > > > > Rob > > Kind regards > Uffe