The MSS clock provider have a bunch of generic properties that are needed in a device tree. Add a YAML schemas for those. Signed-off-by: Taniya Das <tdas@codeaurora.org> --- .../devicetree/bindings/clock/qcom,mss.yaml | 40 ++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,mss.yaml diff --git a/Documentation/devicetree/bindings/clock/qcom,mss.yaml b/Documentation/devicetree/bindings/clock/qcom,mss.yaml new file mode 100644 index 0000000..4494a6b --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,mss.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bindings/clock/qcom,mss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Modem Clock Controller Binding + +maintainers: + - Taniya Das <tdas@codeaurora.org> + +description: | + Qualcomm modem clock control module which supports the clocks. + +properties: + compatible : + enum: + - qcom,mss-sc7180 + + '#clock-cells': + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + - '#clock-cells' + +examples: + # Example of MSS with clock nodes properties for SC7180: + - | + clock-controller@41aa000 { + compatible = "qcom,sc7180-mss"; + reg = <0x041aa000 0x100>; + reg-names = "cc"; + #clock-cells = <1>; + }; +... -- Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Add device tree bindings for modem clock controller for Qualcomm Technology Inc's SC7180 SoCs. Signed-off-by: Taniya Das <tdas@codeaurora.org> --- include/dt-bindings/clock/qcom,gcc-sc7180.h | 5 +++++ include/dt-bindings/clock/qcom,mss-sc7180.h | 12 ++++++++++++ 2 files changed, 17 insertions(+) create mode 100644 include/dt-bindings/clock/qcom,mss-sc7180.h diff --git a/include/dt-bindings/clock/qcom,gcc-sc7180.h b/include/dt-bindings/clock/qcom,gcc-sc7180.h index e8029b2e..08c1a7b 100644 --- a/include/dt-bindings/clock/qcom,gcc-sc7180.h +++ b/include/dt-bindings/clock/qcom,gcc-sc7180.h @@ -132,6 +132,11 @@ #define GCC_VIDEO_GPLL0_DIV_CLK_SRC 122 #define GCC_VIDEO_THROTTLE_AXI_CLK 123 #define GCC_VIDEO_XO_CLK 124 +#define GCC_MSS_CFG_AHB_CBCR 125 +#define GCC_MSS_MFAB_AXIS_CBCR 126 +#define GCC_MSS_NAV_AXI_CBCR 127 +#define GCC_MSS_Q6_MEMNOC_AXI_CBCR 128 +#define GCC_MSS_SNOC_AXI_CBCR 129 /* GCC resets */ #define GCC_QUSB2PHY_PRIM_BCR 0 diff --git a/include/dt-bindings/clock/qcom,mss-sc7180.h b/include/dt-bindings/clock/qcom,mss-sc7180.h new file mode 100644 index 0000000..8ad63ed --- /dev/null +++ b/include/dt-bindings/clock/qcom,mss-sc7180.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2019, The Linux Foundation. All rights reserved. + */ + +#ifndef _DT_BINDINGS_CLK_QCOM_MSS_SC7180_H +#define _DT_BINDINGS_CLK_QCOM_MSS_SC7180_H + +#define MSS_AXI_CRYPTO_CLK 0 +#define MSS_AXI_NAV_CLK 1 + +#endif -- Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Add support for the modem clock controller found on SC7180 based devices. This would allow modem drivers to probe and control their clocks. Signed-off-by: Taniya Das <tdas@codeaurora.org> --- drivers/clk/qcom/Kconfig | 9 +++++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/gcc-sc7180.c | 70 ++++++++++++++++++++++++++++++++ drivers/clk/qcom/mss-sc7180.c | 93 +++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 173 insertions(+) create mode 100644 drivers/clk/qcom/mss-sc7180.c diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig index 3b33ef1..5d4b6e5 100644 --- a/drivers/clk/qcom/Kconfig +++ b/drivers/clk/qcom/Kconfig @@ -245,6 +245,15 @@ config SC_GCC_7180 Say Y if you want to use peripheral devices such as UART, SPI, I2C, USB, UFS, SDCC, etc. +config SC_MSS_7180 + tristate "SC7180 MSS Clock Controller" + select SC_GCC_7180 + help + Support for the MSS clock controller on Qualcomm Technologies, Inc + SC7180 devices. + Say Y if you want to use the MSS branch clocks of the MSS clock + controller to reset the MSS subsystem. + config SDM_CAMCC_845 tristate "SDM845 Camera Clock Controller" select SDM_GCC_845 diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile index d899661..0e66bc6 100644 --- a/drivers/clk/qcom/Makefile +++ b/drivers/clk/qcom/Makefile @@ -46,6 +46,7 @@ obj-$(CONFIG_QCS_GCC_404) += gcc-qcs404.o obj-$(CONFIG_QCS_Q6SSTOP_404) += q6sstop-qcs404.o obj-$(CONFIG_QCS_TURING_404) += turingcc-qcs404.o obj-$(CONFIG_SC_GCC_7180) += gcc-sc7180.o +obj-$(CONFIG_SC_MSS_7180) += mss-sc7180.o obj-$(CONFIG_SDM_CAMCC_845) += camcc-sdm845.o obj-$(CONFIG_SDM_DISPCC_845) += dispcc-sdm845.o obj-$(CONFIG_SDM_GCC_660) += gcc-sdm660.o diff --git a/drivers/clk/qcom/gcc-sc7180.c b/drivers/clk/qcom/gcc-sc7180.c index 38424e6..7b3a705 100644 --- a/drivers/clk/qcom/gcc-sc7180.c +++ b/drivers/clk/qcom/gcc-sc7180.c @@ -2165,6 +2165,71 @@ static struct clk_branch gcc_video_xo_clk = { }, }; +static struct clk_branch gcc_mss_cfg_ahb_clk = { + .halt_reg = 0x8a000, + .halt_check = BRANCH_HALT, + .clkr = { + .enable_reg = 0x8a000, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mss_cfg_ahb_clk", + .ops = &clk_branch2_ops, + }, + }, +}; + +static struct clk_branch gcc_mss_mfab_axis_clk = { + .halt_reg = 0x8a004, + .halt_check = BRANCH_HALT_VOTED, + .clkr = { + .enable_reg = 0x8a004, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mss_mfab_axis_clk", + .ops = &clk_branch2_ops, + }, + }, +}; + +static struct clk_branch gcc_mss_nav_axi_clk = { + .halt_reg = 0x8a00c, + .halt_check = BRANCH_HALT_VOTED, + .clkr = { + .enable_reg = 0x8a00c, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mss_nav_axi_clk", + .ops = &clk_branch2_ops, + }, + }, +}; + +static struct clk_branch gcc_mss_snoc_axi_clk = { + .halt_reg = 0x8a150, + .halt_check = BRANCH_HALT, + .clkr = { + .enable_reg = 0x8a150, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mss_snoc_axi_clk", + .ops = &clk_branch2_ops, + }, + }, +}; + +static struct clk_branch gcc_mss_q6_memnoc_axi_clk = { + .halt_reg = 0x8a154, + .halt_check = BRANCH_HALT, + .clkr = { + .enable_reg = 0x8a154, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mss_q6_memnoc_axi_clk", + .ops = &clk_branch2_ops, + }, + }, +}; + static struct gdsc ufs_phy_gdsc = { .gdscr = 0x77004, .pd = { @@ -2334,6 +2399,11 @@ static struct clk_regmap *gcc_sc7180_clocks[] = { [GPLL7] = &gpll7.clkr, [GPLL4] = &gpll4.clkr, [GPLL1] = &gpll1.clkr, + [GCC_MSS_CFG_AHB_CBCR] = &gcc_mss_cfg_ahb_clk.clkr, + [GCC_MSS_MFAB_AXIS_CBCR] = &gcc_mss_mfab_axis_clk.clkr, + [GCC_MSS_NAV_AXI_CBCR] = &gcc_mss_nav_axi_clk.clkr, + [GCC_MSS_Q6_MEMNOC_AXI_CBCR] = &gcc_mss_q6_memnoc_axi_clk.clkr, + [GCC_MSS_SNOC_AXI_CBCR] = &gcc_mss_snoc_axi_clk.clkr, }; static const struct qcom_reset_map gcc_sc7180_resets[] = { diff --git a/drivers/clk/qcom/mss-sc7180.c b/drivers/clk/qcom/mss-sc7180.c new file mode 100644 index 0000000..319cf89 --- /dev/null +++ b/drivers/clk/qcom/mss-sc7180.c @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2019, The Linux Foundation. All rights reserved. + */ + +#include <linux/platform_device.h> +#include <linux/module.h> +#include <linux/of_address.h> +#include <linux/regmap.h> + +#include <dt-bindings/clock/qcom,mss-sc7180.h> + +#include "clk-regmap.h" +#include "clk-branch.h" +#include "common.h" + +static struct clk_branch mss_axi_nav_clk = { + .halt_reg = 0xbc, + .halt_check = BRANCH_HALT, + .clkr = { + .enable_reg = 0xbc, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "mss_axi_nav_clk", + .ops = &clk_branch2_ops, + }, + }, +}; + +static struct clk_branch mss_axi_crypto_clk = { + .halt_reg = 0xcc, + .halt_check = BRANCH_HALT, + .clkr = { + .enable_reg = 0xcc, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "mss_axi_crypto_clk", + .ops = &clk_branch2_ops, + }, + }, +}; + +static struct regmap_config mss_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .fast_io = true, +}; + +static struct clk_regmap *mss_sc7180_clocks[] = { + [MSS_AXI_CRYPTO_CLK] = &mss_axi_crypto_clk.clkr, + [MSS_AXI_NAV_CLK] = &mss_axi_nav_clk.clkr, +}; + +static const struct qcom_cc_desc mss_sc7180_desc = { + .config = &mss_regmap_config, + .clks = mss_sc7180_clocks, + .num_clks = ARRAY_SIZE(mss_sc7180_clocks), +}; + +static int mss_sc7180_probe(struct platform_device *pdev) +{ + return qcom_cc_probe(pdev, &mss_sc7180_desc); +} + +static const struct of_device_id mss_sc7180_match_table[] = { + { .compatible = "qcom,sc7180-mss" }, + { } +}; +MODULE_DEVICE_TABLE(of, mss_sc7180_match_table); + +static struct platform_driver mss_sc7180_driver = { + .probe = mss_sc7180_probe, + .driver = { + .name = "sc7180-mss", + .of_match_table = mss_sc7180_match_table, + }, +}; + +static int __init mss_sc7180_init(void) +{ + return platform_driver_register(&mss_sc7180_driver); +} +subsys_initcall(mss_sc7180_init); + +static void __exit mss_sc7180_exit(void) +{ + platform_driver_unregister(&mss_sc7180_driver); +} +module_exit(mss_sc7180_exit); + +MODULE_DESCRIPTION("QTI MSS SC7180 Driver"); +MODULE_LICENSE("GPL v2"); -- Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
On Wed, Dec 04, 2019 at 08:21:56AM +0000, Taniya Das wrote: > The MSS clock provider have a bunch of generic properties that > are needed in a device tree. Add a YAML schemas for those. > > Signed-off-by: Taniya Das <tdas@codeaurora.org> > --- > .../devicetree/bindings/clock/qcom,mss.yaml | 40 ++++++++++++++++++++++ > 1 file changed, 40 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,mss.yaml > > diff --git a/Documentation/devicetree/bindings/clock/qcom,mss.yaml b/Documentation/devicetree/bindings/clock/qcom,mss.yaml > new file mode 100644 > index 0000000..4494a6b > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,mss.yaml > @@ -0,0 +1,40 @@ > +# SPDX-License-Identifier: GPL-2.0-only Dual license new bindings please: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/bindings/clock/qcom,mss.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Modem Clock Controller Binding > + > +maintainers: > + - Taniya Das <tdas@codeaurora.org> > + > +description: | > + Qualcomm modem clock control module which supports the clocks. > + > +properties: > + compatible : > + enum: > + - qcom,mss-sc7180 Normal order is 'qcom,sc7180-mss'. > + > + '#clock-cells': > + const: 1 > + > + reg: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - '#clock-cells' Add: additionalItems: false > + > +examples: > + # Example of MSS with clock nodes properties for SC7180: > + - | > + clock-controller@41aa000 { > + compatible = "qcom,sc7180-mss"; > + reg = <0x041aa000 0x100>; > + reg-names = "cc"; Not documented, nor necessary. > + #clock-cells = <1>; > + }; > +... > -- > Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member > of the Code Aurora Forum, hosted by the Linux Foundation. >
On Wed, 4 Dec 2019 08:22:06 +0000, Taniya Das wrote:
> Add device tree bindings for modem clock controller for
> Qualcomm Technology Inc's SC7180 SoCs.
>
> Signed-off-by: Taniya Das <tdas@codeaurora.org>
> ---
> include/dt-bindings/clock/qcom,gcc-sc7180.h | 5 +++++
> include/dt-bindings/clock/qcom,mss-sc7180.h | 12 ++++++++++++
> 2 files changed, 17 insertions(+)
> create mode 100644 include/dt-bindings/clock/qcom,mss-sc7180.h
>
Reviewed-by: Rob Herring <robh@kernel.org>
Quoting Taniya Das (2019-12-04 00:21:24)
> Add driver support for Modem clock controller for SC7180 and also
> update device tree bindings for the various clocks supported in the
> clock controller.
>
>
Can you resend this? I got duplicate emails and I think it's resolved
now on your end.
Hello Rob, Thanks for the review comments. On 12/16/2019 11:31 PM, Rob Herring wrote: > On Wed, Dec 04, 2019 at 08:21:56AM +0000, Taniya Das wrote: >> The MSS clock provider have a bunch of generic properties that >> are needed in a device tree. Add a YAML schemas for those. >> >> Signed-off-by: Taniya Das <tdas@codeaurora.org> >> --- >> .../devicetree/bindings/clock/qcom,mss.yaml | 40 ++++++++++++++++++++++ >> 1 file changed, 40 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/clock/qcom,mss.yaml >> >> diff --git a/Documentation/devicetree/bindings/clock/qcom,mss.yaml b/Documentation/devicetree/bindings/clock/qcom,mss.yaml >> new file mode 100644 >> index 0000000..4494a6b >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/clock/qcom,mss.yaml >> @@ -0,0 +1,40 @@ >> +# SPDX-License-Identifier: GPL-2.0-only > > Dual license new bindings please: > > (GPL-2.0-only OR BSD-2-Clause) > Will update the license. >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/bindings/clock/qcom,mss.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm Modem Clock Controller Binding >> + >> +maintainers: >> + - Taniya Das <tdas@codeaurora.org> >> + >> +description: | >> + Qualcomm modem clock control module which supports the clocks. >> + >> +properties: >> + compatible : >> + enum: >> + - qcom,mss-sc7180 > > Normal order is 'qcom,sc7180-mss'. > My bad. >> + >> + '#clock-cells': >> + const: 1 >> + >> + reg: >> + maxItems: 1 >> + >> +required: >> + - compatible >> + - reg >> + - '#clock-cells' > > Add: > > additionalItems: false > Will add it in the next patch. >> + >> +examples: >> + # Example of MSS with clock nodes properties for SC7180: >> + - | >> + clock-controller@41aa000 { >> + compatible = "qcom,sc7180-mss"; >> + reg = <0x041aa000 0x100>; >> + reg-names = "cc"; > > Not documented, nor necessary. > Will remove this. >> + #clock-cells = <1>; >> + }; >> +... >> -- >> Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member >> of the Code Aurora Forum, hosted by the Linux Foundation. >> -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation. --
Hello Stephen,
On 12/17/2019 11:54 AM, Stephen Boyd wrote:
> Quoting Taniya Das (2019-12-04 00:21:24)
>> Add driver support for Modem clock controller for SC7180 and also
>> update device tree bindings for the various clocks supported in the
>> clock controller.
>>
>>
>
> Can you resend this? I got duplicate emails and I think it's resolved
> now on your end.
>
Will resend the patches.
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation.
--