From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0C10C33C8C for ; Tue, 7 Jan 2020 16:52:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AE42D214D8 for ; Tue, 7 Jan 2020 16:52:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728366AbgAGQwL (ORCPT ); Tue, 7 Jan 2020 11:52:11 -0500 Received: from avon.wwwdotorg.org ([104.237.132.123]:34038 "EHLO avon.wwwdotorg.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728215AbgAGQwL (ORCPT ); Tue, 7 Jan 2020 11:52:11 -0500 X-Greylist: delayed 455 seconds by postgrey-1.27 at vger.kernel.org; Tue, 07 Jan 2020 11:52:11 EST Received: from [10.20.204.51] (unknown [216.228.112.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by avon.wwwdotorg.org (Postfix) with ESMTPSA id 1DE3A1C009A; Tue, 7 Jan 2020 09:44:34 -0700 (MST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.101.4 at avon.wwwdotorg.org Subject: Re: [PATCH V3 1/4] clk: tegra: mark fuse clock as critical From: Stephen Warren To: Thierry Reding Cc: Jonathan Hunter , Peter De Schrijver , Prashant Gaikwad , Michael Turquette , Stephen Boyd , linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org References: <20191003205033.98381-1-swarren@wwwdotorg.org> Message-ID: <0902e0c7-5d71-e7aa-ee5d-21933e1b47fe@wwwdotorg.org> Date: Tue, 7 Jan 2020 09:44:33 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 In-Reply-To: <20191003205033.98381-1-swarren@wwwdotorg.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org On 10/3/19 2:50 PM, Stephen Warren wrote: > From: Stephen Warren > > For a little over a year, U-Boot on Tegra124 has configured the flow > controller to perform automatic RAM re-repair on off->on power transitions > of the CPU rail1]. This is mandatory for correct operation of Tegra124. > However, RAM re-repair relies on certain clocks, which the kernel must > enable and leave running. The fuse clock is one of those clocks. Mark this > clock as critical so that LP1 power mode (system suspend) operates > correctly. > > [1] 3cc7942a4ae5 ARM: tegra: implement RAM repair Thierry, this series doesn't seem to be applied yet; could you please take a look? Thanks.