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received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: XQvtdQHqgmv60t3mjd+kJy0C2VsyFO+FyldrvwUanMN/GN0IkPzQxGDJ9z1vRgJRauYLxGiYL4S5eiqnIyiN1AhzwjD1mtffo8ST7hbp0Wgq82VpAPzK6FKd47CDvvVmriiDfJsY4Yp+2L4k/1L8s7OGLSpGPtWzPOrsZgTpeECaUCp4QFCddy57okIUFXvhce1PZi9AxNPoJepOOkWIZiwom7ZcaNKPToNxCY/9DxkXtPaQgBQAjJmgmsiNhsODzy2mRSbJijqIoXeXPcjAhXggYjjUy6X1ffarAJetjSf8WVC74IL+8TG4YPHbxcbv spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4bb5f2c6-3729-47b4-1879-08d661d90940 X-MS-Exchange-CrossTenant-originalarrivaltime: 14 Dec 2018 15:30:11.4800 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0402MB3754 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The arrays containing the mux selectors need to be of const pointer to const char. Signed-off-by: Abel Vesa --- drivers/clk/imx/clk-imx8mq.c | 194 +++++++++++++++++++++------------------= ---- 1 file changed, 97 insertions(+), 97 deletions(-) diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c index 26b57f4..398ab0b 100644 --- a/drivers/clk/imx/clk-imx8mq.c +++ b/drivers/clk/imx/clk-imx8mq.c @@ -26,245 +26,245 @@ static u32 share_count_nand; =20 static struct clk *clks[IMX8MQ_CLK_END]; =20 -static const char *pll_ref_sels[] =3D { "osc_25m", "osc_27m", "dummy", "du= mmy", }; -static const char *arm_pll_bypass_sels[] =3D {"arm_pll", "arm_pll_ref_sel"= , }; -static const char *gpu_pll_bypass_sels[] =3D {"gpu_pll", "gpu_pll_ref_sel"= , }; -static const char *vpu_pll_bypass_sels[] =3D {"vpu_pll", "vpu_pll_ref_sel"= , }; -static const char *audio_pll1_bypass_sels[] =3D {"audio_pll1", "audio_pll1= _ref_sel", }; -static const char *audio_pll2_bypass_sels[] =3D {"audio_pll2", "audio_pll2= _ref_sel", }; -static const char *video_pll1_bypass_sels[] =3D {"video_pll1", "video_pll1= _ref_sel", }; - -static const char *sys1_pll1_out_sels[] =3D {"sys1_pll1", "sys1_pll1_ref_s= el", }; -static const char *sys2_pll1_out_sels[] =3D {"sys2_pll1", "sys1_pll1_ref_s= el", }; -static const char *sys3_pll1_out_sels[] =3D {"sys3_pll1", "sys3_pll1_ref_s= el", }; -static const char *dram_pll1_out_sels[] =3D {"dram_pll1", "dram_pll1_ref_s= el", }; - -static const char *sys1_pll2_out_sels[] =3D {"sys1_pll2_div", "sys1_pll1_r= ef_sel", }; -static const char *sys2_pll2_out_sels[] =3D {"sys2_pll2_div", "sys2_pll1_r= ef_sel", }; -static const char *sys3_pll2_out_sels[] =3D {"sys3_pll2_div", "sys2_pll1_r= ef_sel", }; -static const char *dram_pll2_out_sels[] =3D {"dram_pll2_div", "dram_pll1_r= ef_sel", }; +static const char * const pll_ref_sels[] =3D { "osc_25m", "osc_27m", "dumm= y", "dummy", }; +static const char * const arm_pll_bypass_sels[] =3D {"arm_pll", "arm_pll_r= ef_sel", }; +static const char * const gpu_pll_bypass_sels[] =3D {"gpu_pll", "gpu_pll_r= ef_sel", }; +static const char * const vpu_pll_bypass_sels[] =3D {"vpu_pll", "vpu_pll_r= ef_sel", }; +static const char * const audio_pll1_bypass_sels[] =3D {"audio_pll1", "aud= io_pll1_ref_sel", }; +static const char * const audio_pll2_bypass_sels[] =3D {"audio_pll2", "aud= io_pll2_ref_sel", }; +static const char * const video_pll1_bypass_sels[] =3D {"video_pll1", "vid= eo_pll1_ref_sel", }; + +static const char * const sys1_pll1_out_sels[] =3D {"sys1_pll1", "sys1_pll= 1_ref_sel", }; +static const char * const sys2_pll1_out_sels[] =3D {"sys2_pll1", "sys1_pll= 1_ref_sel", }; +static const char * const sys3_pll1_out_sels[] =3D {"sys3_pll1", "sys3_pll= 1_ref_sel", }; +static const char * const dram_pll1_out_sels[] =3D {"dram_pll1", "dram_pll= 1_ref_sel", }; + +static const char * const sys1_pll2_out_sels[] =3D {"sys1_pll2_div", "sys1= _pll1_ref_sel", }; +static const char * const sys2_pll2_out_sels[] =3D {"sys2_pll2_div", "sys2= _pll1_ref_sel", }; +static const char * const sys3_pll2_out_sels[] =3D {"sys3_pll2_div", "sys2= _pll1_ref_sel", }; +static const char * const dram_pll2_out_sels[] =3D {"dram_pll2_div", "dram= _pll1_ref_sel", }; =20 /* CCM ROOT */ -static const char *imx8mq_a53_sels[] =3D {"osc_25m", "arm_pll_out", "sys2_= pll_500m", "sys2_pll_1000m", +static const char * const imx8mq_a53_sels[] =3D {"osc_25m", "arm_pll_out",= "sys2_pll_500m", "sys2_pll_1000m", "sys1_pll_800m", "sys1_pll_400m", "audio_pll1_out", "sys3_pll2_out", = }; =20 -static const char *imx8mq_vpu_sels[] =3D {"osc_25m", "arm_pll_out", "sys2_= pll_500m", "sys2_pll_1000m", +static const char * const imx8mq_vpu_sels[] =3D {"osc_25m", "arm_pll_out",= "sys2_pll_500m", "sys2_pll_1000m", "sys1_pll_800m", "sys1_pll_400m", "audio_pll1_out", "vpu_pll_out", }; =20 -static const char *imx8mq_gpu_core_sels[] =3D {"osc_25m", "gpu_pll_out", "= sys1_pll_800m", "sys3_pll2_out", +static const char * const imx8mq_gpu_core_sels[] =3D {"osc_25m", "gpu_pll_= out", "sys1_pll_800m", "sys3_pll2_out", "sys2_pll_1000m", "audio_pll1_out", "video_pll1_out", "audio_pll= 2_out", }; =20 -static const char *imx8mq_gpu_shader_sels[] =3D {"osc_25m", "gpu_pll_out",= "sys1_pll_800m", "sys3_pll2_out", +static const char * const imx8mq_gpu_shader_sels[] =3D {"osc_25m", "gpu_pl= l_out", "sys1_pll_800m", "sys3_pll2_out", "sys2_pll_1000m", "audio_pll1_out", "video_pll1_out", "audio_p= ll2_out", }; =20 -static const char *imx8mq_main_axi_sels[] =3D {"osc_25m", "sys2_pll_333m",= "sys1_pll_800m", "sys2_pll_250m", +static const char * const imx8mq_main_axi_sels[] =3D {"osc_25m", "sys2_pll= _333m", "sys1_pll_800m", "sys2_pll_250m", "sys2_pll_1000m", "audio_pll1_out", "video_pll1_out", "sys1_pll_= 100m",}; =20 -static const char *imx8mq_enet_axi_sels[] =3D {"osc_25m", "sys1_pll_266m",= "sys1_pll_800m", "sys2_pll_250m", +static const char * const imx8mq_enet_axi_sels[] =3D {"osc_25m", "sys1_pll= _266m", "sys1_pll_800m", "sys2_pll_250m", "sys2_pll_200m", "audio_pll1_out", "video_pll1_out", "sys3_pll2_= out", }; =20 -static const char *imx8mq_nand_usdhc_sels[] =3D {"osc_25m", "sys1_pll_266m= ", "sys1_pll_800m", "sys2_pll_200m", +static const char * const imx8mq_nand_usdhc_sels[] =3D {"osc_25m", "sys1_p= ll_266m", "sys1_pll_800m", "sys2_pll_200m", "sys1_pll_133m", "sys3_pll2_out", "sys2_pll_250m", "audio_pll1= _out", }; =20 -static const char *imx8mq_vpu_bus_sels[] =3D {"osc_25m", "sys1_pll_800m", = "vpu_pll_out", "audio_pll2_out", "sys3_pll2_out", "sys2_pll_1000m", "sys2_p= ll_200m", "sys1_pll_100m", }; +static const char * const imx8mq_vpu_bus_sels[] =3D {"osc_25m", "sys1_pll_= 800m", "vpu_pll_out", "audio_pll2_out", "sys3_pll2_out", "sys2_pll_1000m", = "sys2_pll_200m", "sys1_pll_100m", }; =20 -static const char *imx8mq_disp_axi_sels[] =3D {"osc_25m", "sys2_pll_125m",= "sys1_pll_800m", "sys3_pll2_out", "sys1_pll_400m", "audio_pll2_out", "clk_= ext1", "clk_ext4", }; +static const char * const imx8mq_disp_axi_sels[] =3D {"osc_25m", "sys2_pll= _125m", "sys1_pll_800m", "sys3_pll2_out", "sys1_pll_400m", "audio_pll2_out"= , "clk_ext1", "clk_ext4", }; =20 -static const char *imx8mq_disp_apb_sels[] =3D {"osc_25m", "sys2_pll_125m",= "sys1_pll_800m", "sys3_pll2_out", +static const char * const imx8mq_disp_apb_sels[] =3D {"osc_25m", "sys2_pll= _125m", "sys1_pll_800m", "sys3_pll2_out", "sys1_pll_40m", "audio_pll2_out", "clk_ext1", "clk_ext3", }; =20 -static const char *imx8mq_disp_rtrm_sels[] =3D {"osc_25m", "sys1_pll_800m"= , "sys2_pll_200m", "sys1_pll_400m", +static const char * const imx8mq_disp_rtrm_sels[] =3D {"osc_25m", "sys1_pl= l_800m", "sys2_pll_200m", "sys1_pll_400m", "audio_pll1_out", "video_pll1_out", "clk_ext2", "clk_ext3", }; =20 -static const char *imx8mq_usb_bus_sels[] =3D {"osc_25m", "sys2_pll_500m", = "sys1_pll_800m", "sys2_pll_100m", +static const char * const imx8mq_usb_bus_sels[] =3D {"osc_25m", "sys2_pll_= 500m", "sys1_pll_800m", "sys2_pll_100m", "sys2_pll_200m", "clk_ext2", "clk_ext4", "audio_pll2_out", }; =20 -static const char *imx8mq_gpu_axi_sels[] =3D {"osc_25m", "sys1_pll_800m", = "gpu_pll_out", "sys3_pll2_out", "sys2_pll_1000m", +static const char * const imx8mq_gpu_axi_sels[] =3D {"osc_25m", "sys1_pll_= 800m", "gpu_pll_out", "sys3_pll2_out", "sys2_pll_1000m", "audio_pll1_out", "video_pll1_out", "audio_pll2_out", }; =20 -static const char *imx8mq_gpu_ahb_sels[] =3D {"osc_25m", "sys1_pll_800m", = "gpu_pll_out", "sys3_pll2_out", "sys2_pll_1000m", +static const char * const imx8mq_gpu_ahb_sels[] =3D {"osc_25m", "sys1_pll_= 800m", "gpu_pll_out", "sys3_pll2_out", "sys2_pll_1000m", "audio_pll1_out", "video_pll1_out", "audio_pll2_out", }; =20 -static const char *imx8mq_noc_sels[] =3D {"osc_25m", "sys1_pll_800m", "sys= 3_pll2_out", "sys2_pll_1000m", "sys2_pll_500m", +static const char * const imx8mq_noc_sels[] =3D {"osc_25m", "sys1_pll_800m= ", "sys3_pll2_out", "sys2_pll_1000m", "sys2_pll_500m", "audio_pll1_out", "video_pll1_out", "audio_pll2_out", }; =20 -static const char *imx8mq_noc_apb_sels[] =3D {"osc_25m", "sys1_pll_400m", = "sys3_pll2_out", "sys2_pll_333m", "sys2_pll_200m", +static const char * const imx8mq_noc_apb_sels[] =3D {"osc_25m", "sys1_pll_= 400m", "sys3_pll2_out", "sys2_pll_333m", "sys2_pll_200m", "sys1_pll_800m", "audio_pll1_out", "video_pll1_out", }; =20 -static const char *imx8mq_ahb_sels[] =3D {"osc_25m", "sys1_pll_133m", "sys= 1_pll_800m", "sys1_pll_400m", +static const char * const imx8mq_ahb_sels[] =3D {"osc_25m", "sys1_pll_133m= ", "sys1_pll_800m", "sys1_pll_400m", "sys2_pll_125m", "sys3_pll2_out", "audio_pll1_out", "video_pll1_out",= }; =20 -static const char *imx8mq_audio_ahb_sels[] =3D {"osc_25m", "sys2_pll_500m"= , "sys1_pll_800m", "sys2_pll_1000m", +static const char * const imx8mq_audio_ahb_sels[] =3D {"osc_25m", "sys2_pl= l_500m", "sys1_pll_800m", "sys2_pll_1000m", "sys2_pll_166m", "sys3_pll2_out", "audio_pll1_out", "video_pll1_ou= t", }; =20 -static const char *imx8mq_dsi_ahb_sels[] =3D {"osc_25m", "sys2_pll_100m", = "sys1_pll_80m", "sys1_pll_800m", +static const char * const imx8mq_dsi_ahb_sels[] =3D {"osc_25m", "sys2_pll_= 100m", "sys1_pll_80m", "sys1_pll_800m", "sys2_pll_1000m", "sys3_pll2_out", "clk_ext3", "audio_pll2_out"}; =20 -static const char *imx8mq_dram_alt_sels[] =3D {"osc_25m", "sys1_pll_800m",= "sys1_pll_100m", "sys2_pll_500m", +static const char * const imx8mq_dram_alt_sels[] =3D {"osc_25m", "sys1_pll= _800m", "sys1_pll_100m", "sys2_pll_500m", "sys2_pll_250m", "sys1_pll_400m", "audio_pll1_out", "sys1_pll_266m",= }; =20 -static const char *imx8mq_dram_apb_sels[] =3D {"osc_25m", "sys2_pll_200m",= "sys1_pll_40m", "sys1_pll_160m", +static const char * const imx8mq_dram_apb_sels[] =3D {"osc_25m", "sys2_pll= _200m", "sys1_pll_40m", "sys1_pll_160m", "sys1_pll_800m", "sys3_pll2_out", "sys2_pll_250m", "audio_pll2_out",= }; =20 -static const char *imx8mq_vpu_g1_sels[] =3D {"osc_25m", "vpu_pll_out", "sy= s1_pll_800m", "sys2_pll_1000m", "sys1_pll_100m", "sys2_pll_125m", "sys3_pll= 2_out", "audio_pll1_out", }; +static const char * const imx8mq_vpu_g1_sels[] =3D {"osc_25m", "vpu_pll_ou= t", "sys1_pll_800m", "sys2_pll_1000m", "sys1_pll_100m", "sys2_pll_125m", "s= ys3_pll2_out", "audio_pll1_out", }; =20 -static const char *imx8mq_vpu_g2_sels[] =3D {"osc_25m", "vpu_pll_out", "sy= s1_pll_800m", "sys2_pll_1000m", "sys1_pll_100m", "sys2_pll_125m", "sys3_pll= 2_out", "audio_pll1_out", }; +static const char * const imx8mq_vpu_g2_sels[] =3D {"osc_25m", "vpu_pll_ou= t", "sys1_pll_800m", "sys2_pll_1000m", "sys1_pll_100m", "sys2_pll_125m", "s= ys3_pll2_out", "audio_pll1_out", }; =20 -static const char *imx8mq_disp_dtrc_sels[] =3D {"osc_25m", "vpu_pll_out", = "sys1_pll_800m", "sys2_pll_1000m", "sys1_pll_160m", "sys2_pll_100m", "sys3_= pll2_out", "audio_pll2_out", }; +static const char * const imx8mq_disp_dtrc_sels[] =3D {"osc_25m", "vpu_pll= _out", "sys1_pll_800m", "sys2_pll_1000m", "sys1_pll_160m", "sys2_pll_100m",= "sys3_pll2_out", "audio_pll2_out", }; =20 -static const char *imx8mq_disp_dc8000_sels[] =3D {"osc_25m", "vpu_pll_out"= , "sys1_pll_800m", "sys2_pll_1000m", "sys1_pll_160m", "sys2_pll_100m", "sys= 3_pll2_out", "audio_pll2_out", }; +static const char * const imx8mq_disp_dc8000_sels[] =3D {"osc_25m", "vpu_p= ll_out", "sys1_pll_800m", "sys2_pll_1000m", "sys1_pll_160m", "sys2_pll_100m= ", "sys3_pll2_out", "audio_pll2_out", }; =20 -static const char *imx8mq_pcie1_ctrl_sels[] =3D {"osc_25m", "sys2_pll_250m= ", "sys2_pll_200m", "sys1_pll_266m", +static const char * const imx8mq_pcie1_ctrl_sels[] =3D {"osc_25m", "sys2_p= ll_250m", "sys2_pll_200m", "sys1_pll_266m", "sys1_pll_800m", "sys2_pll_500m", "sys2_pll_250m", "sys3_pll2_= out", }; =20 -static const char *imx8mq_pcie1_phy_sels[] =3D {"osc_25m", "sys2_pll_100m"= , "sys2_pll_500m", "clk_ext1", "clk_ext2", +static const char * const imx8mq_pcie1_phy_sels[] =3D {"osc_25m", "sys2_pl= l_100m", "sys2_pll_500m", "clk_ext1", "clk_ext2", "clk_ext3", "clk_ext4", }; =20 -static const char *imx8mq_pcie1_aux_sels[] =3D {"osc_25m", "sys2_pll_200m"= , "sys2_pll_500m", "sys3_pll2_out", +static const char * const imx8mq_pcie1_aux_sels[] =3D {"osc_25m", "sys2_pl= l_200m", "sys2_pll_500m", "sys3_pll2_out", "sys2_pll_100m", "sys1_pll_80m", "sys1_pll_160m", "sys1_pll_200= m", }; =20 -static const char *imx8mq_dc_pixel_sels[] =3D {"osc_25m", "video_pll1_out"= , "audio_pll2_out", "audio_pll1_out", "sys1_pll_800m", "sys2_pll_1000m", "s= ys3_pll2_out", "clk_ext4", }; +static const char * const imx8mq_dc_pixel_sels[] =3D {"osc_25m", "video_pl= l1_out", "audio_pll2_out", "audio_pll1_out", "sys1_pll_800m", "sys2_pll_100= 0m", "sys3_pll2_out", "clk_ext4", }; =20 -static const char *imx8mq_lcdif_pixel_sels[] =3D {"osc_25m", "video_pll1_o= ut", "audio_pll2_out", "audio_pll1_out", "sys1_pll_800m", "sys2_pll_1000m",= "sys3_pll2_out", "clk_ext4", }; +static const char * const imx8mq_lcdif_pixel_sels[] =3D {"osc_25m", "video= _pll1_out", "audio_pll2_out", "audio_pll1_out", "sys1_pll_800m", "sys2_pll_= 1000m", "sys3_pll2_out", "clk_ext4", }; =20 -static const char *imx8mq_sai1_sels[] =3D {"osc_25m", "audio_pll1_out", "a= udio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk_ext1", "= clk_ext2", }; +static const char * const imx8mq_sai1_sels[] =3D {"osc_25m", "audio_pll1_o= ut", "audio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk_e= xt1", "clk_ext2", }; =20 -static const char *imx8mq_sai2_sels[] =3D {"osc_25m", "audio_pll1_out", "a= udio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk_ext2", "= clk_ext3", }; +static const char * const imx8mq_sai2_sels[] =3D {"osc_25m", "audio_pll1_o= ut", "audio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk_e= xt2", "clk_ext3", }; =20 -static const char *imx8mq_sai3_sels[] =3D {"osc_25m", "audio_pll1_out", "a= udio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk_ext3", "= clk_ext4", }; +static const char * const imx8mq_sai3_sels[] =3D {"osc_25m", "audio_pll1_o= ut", "audio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk_e= xt3", "clk_ext4", }; =20 -static const char *imx8mq_sai4_sels[] =3D {"osc_25m", "audio_pll1_out", "a= udio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk_ext1", "= clk_ext2", }; +static const char * const imx8mq_sai4_sels[] =3D {"osc_25m", "audio_pll1_o= ut", "audio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk_e= xt1", "clk_ext2", }; =20 -static const char *imx8mq_sai5_sels[] =3D {"osc_25m", "audio_pll1_out", "a= udio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk_ext2", "= clk_ext3", }; +static const char * const imx8mq_sai5_sels[] =3D {"osc_25m", "audio_pll1_o= ut", "audio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk_e= xt2", "clk_ext3", }; =20 -static const char *imx8mq_sai6_sels[] =3D {"osc_25m", "audio_pll1_out", "a= udio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk_ext3", "= clk_ext4", }; +static const char * const imx8mq_sai6_sels[] =3D {"osc_25m", "audio_pll1_o= ut", "audio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk_e= xt3", "clk_ext4", }; =20 -static const char *imx8mq_spdif1_sels[] =3D {"osc_25m", "audio_pll1_out", = "audio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk_ext2",= "clk_ext3", }; +static const char * const imx8mq_spdif1_sels[] =3D {"osc_25m", "audio_pll1= _out", "audio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk= _ext2", "clk_ext3", }; =20 -static const char *imx8mq_spdif2_sels[] =3D {"osc_25m", "audio_pll1_out", = "audio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk_ext3",= "clk_ext4", }; +static const char * const imx8mq_spdif2_sels[] =3D {"osc_25m", "audio_pll1= _out", "audio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk= _ext3", "clk_ext4", }; =20 -static const char *imx8mq_enet_ref_sels[] =3D {"osc_25m", "sys2_pll_125m",= "sys2_pll_500m", "sys2_pll_100m", +static const char * const imx8mq_enet_ref_sels[] =3D {"osc_25m", "sys2_pll= _125m", "sys2_pll_500m", "sys2_pll_100m", "sys1_pll_160m", "audio_pll1_out", "video_pll1_out", "clk_ext4",= }; =20 -static const char *imx8mq_enet_timer_sels[] =3D {"osc_25m", "sys2_pll_100m= ", "audio_pll1_out", "clk_ext1", "clk_ext2", +static const char * const imx8mq_enet_timer_sels[] =3D {"osc_25m", "sys2_p= ll_100m", "audio_pll1_out", "clk_ext1", "clk_ext2", "clk_ext3", "clk_ext4", "video_pll1_out", }; =20 -static const char *imx8mq_enet_phy_sels[] =3D {"osc_25m", "sys2_pll_50m", = "sys2_pll_125m", "sys2_pll_500m", +static const char * const imx8mq_enet_phy_sels[] =3D {"osc_25m", "sys2_pll= _50m", "sys2_pll_125m", "sys2_pll_500m", "audio_pll1_out", "video_pll1_out", "audio_pll2_out", }; =20 -static const char *imx8mq_nand_sels[] =3D {"osc_25m", "sys2_pll_500m", "au= dio_pll1_out", "sys1_pll_400m", +static const char * const imx8mq_nand_sels[] =3D {"osc_25m", "sys2_pll_500= m", "audio_pll1_out", "sys1_pll_400m", "audio_pll2_out", "sys3_pll2_out", "sys2_pll_250m", "video_pll1_out"= , }; =20 -static const char *imx8mq_qspi_sels[] =3D {"osc_25m", "sys1_pll_400m", "sy= s1_pll_800m", "sys2_pll_500m", +static const char * const imx8mq_qspi_sels[] =3D {"osc_25m", "sys1_pll_400= m", "sys1_pll_800m", "sys2_pll_500m", "audio_pll2_out", "sys1_pll_266m", "sys3_pll2_out", "sys1_pll_100m",= }; =20 -static const char *imx8mq_usdhc1_sels[] =3D {"osc_25m", "sys1_pll_400m", "= sys1_pll_800m", "sys2_pll_500m", +static const char * const imx8mq_usdhc1_sels[] =3D {"osc_25m", "sys1_pll_4= 00m", "sys1_pll_800m", "sys2_pll_500m", "audio_pll2_out", "sys1_pll_266m", "sys3_pll2_out", "sys1_pll_100m",= }; =20 -static const char *imx8mq_usdhc2_sels[] =3D {"osc_25m", "sys1_pll_400m", "= sys1_pll_800m", "sys2_pll_500m", +static const char * const imx8mq_usdhc2_sels[] =3D {"osc_25m", "sys1_pll_4= 00m", "sys1_pll_800m", "sys2_pll_500m", "audio_pll2_out", "sys1_pll_266m", "sys3_pll2_out", "sys1_pll_100m",= }; =20 -static const char *imx8mq_i2c1_sels[] =3D {"osc_25m", "sys1_pll_160m", "sy= s2_pll_50m", "sys3_pll2_out", "audio_pll1_out", +static const char * const imx8mq_i2c1_sels[] =3D {"osc_25m", "sys1_pll_160= m", "sys2_pll_50m", "sys3_pll2_out", "audio_pll1_out", "video_pll1_out", "audio_pll2_out", "sys1_pll_133m", }; =20 -static const char *imx8mq_i2c2_sels[] =3D {"osc_25m", "sys1_pll_160m", "sy= s2_pll_50m", "sys3_pll2_out", "audio_pll1_out", +static const char * const imx8mq_i2c2_sels[] =3D {"osc_25m", "sys1_pll_160= m", "sys2_pll_50m", "sys3_pll2_out", "audio_pll1_out", "video_pll1_out", "audio_pll2_out", "sys1_pll_133m", }; =20 -static const char *imx8mq_i2c3_sels[] =3D {"osc_25m", "sys1_pll_160m", "sy= s2_pll_50m", "sys3_pll2_out", "audio_pll1_out", +static const char * const imx8mq_i2c3_sels[] =3D {"osc_25m", "sys1_pll_160= m", "sys2_pll_50m", "sys3_pll2_out", "audio_pll1_out", "video_pll1_out", "audio_pll2_out", "sys1_pll_133m", }; =20 -static const char *imx8mq_i2c4_sels[] =3D {"osc_25m", "sys1_pll_160m", "sy= s2_pll_50m", "sys3_pll2_out", "audio_pll1_out", +static const char * const imx8mq_i2c4_sels[] =3D {"osc_25m", "sys1_pll_160= m", "sys2_pll_50m", "sys3_pll2_out", "audio_pll1_out", "video_pll1_out", "audio_pll2_out", "sys1_pll_133m", }; =20 -static const char *imx8mq_uart1_sels[] =3D {"osc_25m", "sys1_pll_80m", "sy= s2_pll_200m", "sys2_pll_100m", +static const char * const imx8mq_uart1_sels[] =3D {"osc_25m", "sys1_pll_80= m", "sys2_pll_200m", "sys2_pll_100m", "sys3_pll2_out", "clk_ext2", "clk_ext4", "audio_pll2_out", }; =20 -static const char *imx8mq_uart2_sels[] =3D {"osc_25m", "sys1_pll_80m", "sy= s2_pll_200m", "sys2_pll_100m", +static const char * const imx8mq_uart2_sels[] =3D {"osc_25m", "sys1_pll_80= m", "sys2_pll_200m", "sys2_pll_100m", "sys3_pll2_out", "clk_ext2", "clk_ext3", "audio_pll2_out", }; =20 -static const char *imx8mq_uart3_sels[] =3D {"osc_25m", "sys1_pll_80m", "sy= s2_pll_200m", "sys2_pll_100m", +static const char * const imx8mq_uart3_sels[] =3D {"osc_25m", "sys1_pll_80= m", "sys2_pll_200m", "sys2_pll_100m", "sys3_pll2_out", "clk_ext2", "clk_ext4", "audio_pll2_out", }; =20 -static const char *imx8mq_uart4_sels[] =3D {"osc_25m", "sys1_pll_80m", "sy= s2_pll_200m", "sys2_pll_100m", +static const char * const imx8mq_uart4_sels[] =3D {"osc_25m", "sys1_pll_80= m", "sys2_pll_200m", "sys2_pll_100m", "sys3_pll2_out", "clk_ext2", "clk_ext3", "audio_pll2_out", }; =20 -static const char *imx8mq_usb_core_sels[] =3D {"osc_25m", "sys1_pll_100m",= "sys1_pll_40m", "sys2_pll_100m", +static const char * const imx8mq_usb_core_sels[] =3D {"osc_25m", "sys1_pll= _100m", "sys1_pll_40m", "sys2_pll_100m", "sys2_pll_200m", "clk_ext2", "clk_ext3", "audio_pll2_out", }; =20 -static const char *imx8mq_usb_phy_sels[] =3D {"osc_25m", "sys1_pll_100m", = "sys1_pll_40m", "sys2_pll_100m", +static const char * const imx8mq_usb_phy_sels[] =3D {"osc_25m", "sys1_pll_= 100m", "sys1_pll_40m", "sys2_pll_100m", "sys2_pll_200m", "clk_ext2", "clk_ext3", "audio_pll2_out", }; =20 -static const char *imx8mq_ecspi1_sels[] =3D {"osc_25m", "sys2_pll_200m", "= sys1_pll_40m", "sys1_pll_160m", +static const char * const imx8mq_ecspi1_sels[] =3D {"osc_25m", "sys2_pll_2= 00m", "sys1_pll_40m", "sys1_pll_160m", "sys1_pll_800m", "sys3_pll2_out", "sys2_pll_250m", "audio_pll2_out= ", }; =20 -static const char *imx8mq_ecspi2_sels[] =3D {"osc_25m", "sys2_pll_200m", "= sys1_pll_40m", "sys1_pll_160m", +static const char * const imx8mq_ecspi2_sels[] =3D {"osc_25m", "sys2_pll_2= 00m", "sys1_pll_40m", "sys1_pll_160m", "sys1_pll_800m", "sys3_pll2_out", "sys2_pll_250m", "audio_pll2_out= ", }; =20 -static const char *imx8mq_pwm1_sels[] =3D {"osc_25m", "sys2_pll_100m", "sy= s1_pll_160m", "sys1_pll_40m", +static const char * const imx8mq_pwm1_sels[] =3D {"osc_25m", "sys2_pll_100= m", "sys1_pll_160m", "sys1_pll_40m", "sys3_pll2_out", "clk_ext1", "sys1_pll_80m", "video_pll1_out", }; =20 -static const char *imx8mq_pwm2_sels[] =3D {"osc_25m", "sys2_pll_100m", "sy= s1_pll_160m", "sys1_pll_40m", +static const char * const imx8mq_pwm2_sels[] =3D {"osc_25m", "sys2_pll_100= m", "sys1_pll_160m", "sys1_pll_40m", "sys3_pll2_out", "clk_ext1", "sys1_pll_80m", "video_pll1_out", }; =20 -static const char *imx8mq_pwm3_sels[] =3D {"osc_25m", "sys2_pll_100m", "sy= s1_pll_160m", "sys1_pll_40m", +static const char * const imx8mq_pwm3_sels[] =3D {"osc_25m", "sys2_pll_100= m", "sys1_pll_160m", "sys1_pll_40m", "sys3_pll2_out", "clk_ext2", "sys1_pll_80m", "video_pll1_out", }; =20 -static const char *imx8mq_pwm4_sels[] =3D {"osc_25m", "sys2_pll_100m", "sy= s1_pll_160m", "sys1_pll_40m", +static const char * const imx8mq_pwm4_sels[] =3D {"osc_25m", "sys2_pll_100= m", "sys1_pll_160m", "sys1_pll_40m", "sys3_pll2_out", "clk_ext2", "sys1_pll_80m", "video_pll1_out", }; =20 -static const char *imx8mq_gpt1_sels[] =3D {"osc_25m", "sys2_pll_100m", "sy= s1_pll_400m", "sys1_pll_40m", +static const char * const imx8mq_gpt1_sels[] =3D {"osc_25m", "sys2_pll_100= m", "sys1_pll_400m", "sys1_pll_40m", "sys1_pll_80m", "audio_pll1_out", "clk_ext1", }; =20 -static const char *imx8mq_wdog_sels[] =3D {"osc_25m", "sys1_pll_133m", "sy= s1_pll_160m", "vpu_pll_out", +static const char * const imx8mq_wdog_sels[] =3D {"osc_25m", "sys1_pll_133= m", "sys1_pll_160m", "vpu_pll_out", "sys2_pll_125m", "sys3_pll2_out", "sys1_pll_80m", "sys2_pll_166m", }= ; =20 -static const char *imx8mq_wrclk_sels[] =3D {"osc_25m", "sys1_pll_40m", "vp= u_pll_out", "sys3_pll2_out", "sys2_pll_200m", +static const char * const imx8mq_wrclk_sels[] =3D {"osc_25m", "sys1_pll_40= m", "vpu_pll_out", "sys3_pll2_out", "sys2_pll_200m", "sys1_pll_266m", "sys2_pll_500m", "sys1_pll_100m", }; =20 -static const char *imx8mq_dsi_core_sels[] =3D {"osc_25m", "sys1_pll_266m",= "sys2_pll_250m", "sys1_pll_800m", +static const char * const imx8mq_dsi_core_sels[] =3D {"osc_25m", "sys1_pll= _266m", "sys2_pll_250m", "sys1_pll_800m", "sys2_pll_1000m", "sys3_pll2_out", "audio_pll2_out", "video_pll1= _out", }; =20 -static const char *imx8mq_dsi_phy_sels[] =3D {"osc_25m", "sys2_pll_125m", = "sys2_pll_100m", "sys1_pll_800m", +static const char * const imx8mq_dsi_phy_sels[] =3D {"osc_25m", "sys2_pll_= 125m", "sys2_pll_100m", "sys1_pll_800m", "sys2_pll_1000m", "clk_ext2", "audio_pll2_out", "video_pll1_out",= }; =20 -static const char *imx8mq_dsi_dbi_sels[] =3D {"osc_25m", "sys1_pll_266m", = "sys2_pll_100m", "sys1_pll_800m", +static const char * const imx8mq_dsi_dbi_sels[] =3D {"osc_25m", "sys1_pll_= 266m", "sys2_pll_100m", "sys1_pll_800m", "sys2_pll_1000m", "sys3_pll2_out", "audio_pll2_out", "video_pll1_= out", }; =20 -static const char *imx8mq_dsi_esc_sels[] =3D {"osc_25m", "sys2_pll_100m", = "sys1_pll_80m", "sys1_pll_800m", +static const char * const imx8mq_dsi_esc_sels[] =3D {"osc_25m", "sys2_pll_= 100m", "sys1_pll_80m", "sys1_pll_800m", "sys2_pll_1000m", "sys3_pll2_out", "clk_ext3", "audio_pll2_out", = }; =20 -static const char *imx8mq_csi1_core_sels[] =3D {"osc_25m", "sys1_pll_266m"= , "sys2_pll_250m", "sys1_pll_800m", +static const char * const imx8mq_csi1_core_sels[] =3D {"osc_25m", "sys1_pl= l_266m", "sys2_pll_250m", "sys1_pll_800m", "sys2_pll_1000m", "sys3_pll2_out", "audio_pll2_out", "video_pll= 1_out", }; =20 -static const char *imx8mq_csi1_phy_sels[] =3D {"osc_25m", "sys2_pll_125m",= "sys2_pll_100m", "sys1_pll_800m", +static const char * const imx8mq_csi1_phy_sels[] =3D {"osc_25m", "sys2_pll= _125m", "sys2_pll_100m", "sys1_pll_800m", "sys2_pll_1000m", "clk_ext2", "audio_pll2_out", "video_pll1_out"= , }; =20 -static const char *imx8mq_csi1_esc_sels[] =3D {"osc_25m", "sys2_pll_100m",= "sys1_pll_80m", "sys1_pll_800m", +static const char * const imx8mq_csi1_esc_sels[] =3D {"osc_25m", "sys2_pll= _100m", "sys1_pll_80m", "sys1_pll_800m", "sys2_pll_1000m", "sys3_pll2_out", "clk_ext3", "audio_pll2_out",= }; =20 -static const char *imx8mq_csi2_core_sels[] =3D {"osc_25m", "sys1_pll_266m"= , "sys2_pll_250m", "sys1_pll_800m", +static const char * const imx8mq_csi2_core_sels[] =3D {"osc_25m", "sys1_pl= l_266m", "sys2_pll_250m", "sys1_pll_800m", "sys2_pll_1000m", "sys3_pll2_out", "audio_pll2_out", "video_pll= 1_out", }; =20 -static const char *imx8mq_csi2_phy_sels[] =3D {"osc_25m", "sys2_pll_125m",= "sys2_pll_100m", "sys1_pll_800m", +static const char * const imx8mq_csi2_phy_sels[] =3D {"osc_25m", "sys2_pll= _125m", "sys2_pll_100m", "sys1_pll_800m", "sys2_pll_1000m", "clk_ext2", "audio_pll2_out", "video_pll1_out"= , }; =20 -static const char *imx8mq_csi2_esc_sels[] =3D {"osc_25m", "sys2_pll_100m",= "sys1_pll_80m", "sys1_pll_800m", +static const char * const imx8mq_csi2_esc_sels[] =3D {"osc_25m", "sys2_pll= _100m", "sys1_pll_80m", "sys1_pll_800m", "sys2_pll_1000m", "sys3_pll2_out", "clk_ext3", "audio_pll2_out",= }; =20 -static const char *imx8mq_pcie2_ctrl_sels[] =3D {"osc_25m", "sys2_pll_250m= ", "sys2_pll_200m", "sys1_pll_266m", +static const char * const imx8mq_pcie2_ctrl_sels[] =3D {"osc_25m", "sys2_p= ll_250m", "sys2_pll_200m", "sys1_pll_266m", "sys1_pll_800m", "sys2_pll_500m", "sys2_pll_333m", "sys3_pll2_= out", }; =20 -static const char *imx8mq_pcie2_phy_sels[] =3D {"osc_25m", "sys2_pll_100m"= , "sys2_pll_500m", "clk_ext1", +static const char * const imx8mq_pcie2_phy_sels[] =3D {"osc_25m", "sys2_pl= l_100m", "sys2_pll_500m", "clk_ext1", "clk_ext2", "clk_ext3", "clk_ext4", "sys1_pll_400m", }; =20 -static const char *imx8mq_pcie2_aux_sels[] =3D {"osc_25m", "sys2_pll_200m"= , "sys2_pll_50m", "sys3_pll2_out", +static const char * const imx8mq_pcie2_aux_sels[] =3D {"osc_25m", "sys2_pl= l_200m", "sys2_pll_50m", "sys3_pll2_out", "sys2_pll_100m", "sys1_pll_80m", "sys1_pll_160m", "sys1_pll_200= m", }; =20 -static const char *imx8mq_ecspi3_sels[] =3D {"osc_25m", "sys2_pll_200m", "= sys1_pll_40m", "sys1_pll_160m", +static const char * const imx8mq_ecspi3_sels[] =3D {"osc_25m", "sys2_pll_2= 00m", "sys1_pll_40m", "sys1_pll_160m", "sys1_pll_800m", "sys3_pll2_out", "sys2_pll_250m", "audio_pll2_out= ", }; -static const char *imx8mq_dram_core_sels[] =3D {"dram_pll_out", "dram_alt_= root", }; +static const char * const imx8mq_dram_core_sels[] =3D {"dram_pll_out", "dr= am_alt_root", }; =20 -static const char *imx8mq_clko2_sels[] =3D {"osc_25m", "sys2_pll_200m", "s= ys1_pll_400m", "sys2_pll_166m", "audio_pll1_out", +static const char * const imx8mq_clko2_sels[] =3D {"osc_25m", "sys2_pll_20= 0m", "sys1_pll_400m", "sys2_pll_166m", "audio_pll1_out", "video_pll1_out", "ckil", }; =20 static struct clk_onecell_data clk_data; --=20 2.7.4