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From: Stephen Boyd <sboyd@kernel.org>
To: Andy Gross <andy.gross@linaro.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	David Brown <david.brown@linaro.org>,
	Khasim Syed Mohammed <khasim.mohammed@linaro.org>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Niklas Cassel <niklas.cassel@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Stanimir Varbanov <svarbanov@mm-sol.com>,
	devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pci@vger.kernel.org
Subject: Re: [PATCH 7/7] arm64: dts: qcom: qcs404: Add PCIe related nodes
Date: Wed, 30 Jan 2019 11:24:12 -0800
Message-ID: <154887625299.169292.6293540451460425008@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20190125234509.26419-8-bjorn.andersson@linaro.org>

Quoting Bjorn Andersson (2019-01-25 15:45:09)
> @@ -771,6 +788,56 @@
>                                 status = "disabled";
>                         };
>                 };
> +
> +               pcie: pci@10000000 {
> +                       compatible = "qcom,pcie-qcs404", "snps,dw-pcie";
> +                       reg =  <0x10000000 0xf1d

Nitpick: Can you format these like <0x10000000 0xf1d>, <0x10000f20 0xa8>, etc?

> +                               0x10000f20 0xa8
> +                               0x07780000 0x2000
> +                               0x10001000 0x2000>;
> +                       reg-names = "dbi", "elbi", "parf", "config";
> +                       device_type = "pci";
> +                       linux,pci-domain = <0>;
> +                       bus-range = <0x00 0xff>;
> +                       num-lanes = <1>;
> +                       #address-cells = <3>;
> +                       #size-cells = <2>;
> +
> +                       ranges = <0x81000000 0 0          0x10003000 0 0x00010000   /* I/O */

Same for this one? It's nice to know what the size of the cells are.

> +                                 0x82000000 0 0x10013000 0x10013000 0 0x007ed000>; /* memory */
> +

  reply index

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-25 23:45 [PATCH 0/7] QCS404 PCIe PHY and controller Bjorn Andersson
2019-01-25 23:45 ` [PATCH 1/7] clk: gcc-qcs404: Add PCIe resets Bjorn Andersson
2019-01-30 19:24   ` Stephen Boyd
2019-02-08 14:11   ` Niklas Cassel
2019-01-25 23:45 ` [PATCH 2/7] dt-bindings: phy: Add binding for Qualcomm PCIe2 PHY Bjorn Andersson
2019-02-05  5:54   ` Vinod Koul
2019-01-25 23:45 ` [PATCH 3/7] phy: qcom: Add Qualcomm PCIe2 PHY driver Bjorn Andersson
2019-02-08 14:14   ` Niklas Cassel
2019-01-25 23:45 ` [PATCH 4/7] PCI: qcom: Use clk_bulk API for 2.4.0 controllers Bjorn Andersson
2019-02-08 14:17   ` Niklas Cassel
2019-01-25 23:45 ` [PATCH 5/7] dt-bindings: PCI: qcom: Add QCS404 to the binding Bjorn Andersson
2019-01-25 23:45 ` [PATCH 6/7] PCI: qcom: Add QCS404 PCIe controller support Bjorn Andersson
2019-02-08 16:39   ` Niklas Cassel
2019-01-25 23:45 ` [PATCH 7/7] arm64: dts: qcom: qcs404: Add PCIe related nodes Bjorn Andersson
2019-01-30 19:24   ` Stephen Boyd [this message]
2019-02-05  6:01   ` Vinod Koul
2019-02-08 14:50   ` Niklas Cassel

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