From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B3F6C282D8 for ; Fri, 1 Feb 2019 03:33:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2DBEA20863 for ; Fri, 1 Feb 2019 03:33:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726060AbfBADdt (ORCPT ); Thu, 31 Jan 2019 22:33:49 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:56500 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725807AbfBADdt (ORCPT ); Thu, 31 Jan 2019 22:33:49 -0500 X-UUID: e35ebed60db54c878dd4f21e738472ea-20190201 X-UUID: e35ebed60db54c878dd4f21e738472ea-20190201 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1728458795; Fri, 01 Feb 2019 11:33:40 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 1 Feb 2019 11:33:38 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 1 Feb 2019 11:33:38 +0800 Message-ID: <1548992018.11367.8.camel@mtksdaap41> Subject: Re: [PATCH v6 6/6] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile From: Erin Lo To: Rob Herring CC: Mark Rutland , Ben Ho , "Mars Cheng" , Mengqi Zhang , linux-clk , Hsin-Hsiung Wang , Weiyi Lu , "Marc Zyngier" , "open list:SERIAL DRIVERS" , Yingjoe Chen , , Jason Cooper Date: Fri, 1 Feb 2019 11:33:38 +0800 In-Reply-To: References: <1548317240-44682-1-git-send-email-erin.lo@mediatek.com> <1548317240-44682-7-git-send-email-erin.lo@mediatek.com> <20190130162204.GA1521@bogus> <1548902050.23230.4.camel@mtksdaap41> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-SNTS-SMTP: 083C5F58D12382DC0DD598BD74E31E35297D080F200B466F0EC0D906B431AEB42000:8 X-MTK: N Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org On Thu, 2019-01-31 at 15:10 -0600, Rob Herring wrote: > On Wed, Jan 30, 2019 at 8:34 PM Erin Lo wrote: > > > > On Wed, 2019-01-30 at 10:22 -0600, Rob Herring wrote: > > > On Thu, Jan 24, 2019 at 04:07:20PM +0800, Erin Lo wrote: > > > > From: Ben Ho > > > > > > > > Add basic chip support for Mediatek 8183, include > > > > pinctrl file, uart node with correct uart clocks, pwrap device > > > > > > > > Add clock controller nodes, include topckgen, infracfg, > > > > apmixedsys and subsystem. > > > > > > > > Signed-off-by: Ben Ho > > > > Signed-off-by: Erin Lo > > > > Signed-off-by: Seiya Wang > > > > Signed-off-by: Zhiyong Tao > > > > Signed-off-by: Weiyi Lu > > > > Signed-off-by: Mengqi Zhang > > > > Signed-off-by: Hsin-Hsiung Wang > > > > Signed-off-by: Eddie Huang > > > > --- > > > > > > > > > > + sysirq: intpol-controller@c530a80 { > > > > > > interrupt-controller@... > > > > I will modify it in next version. > > > > > > > > > Place all the MMIO peripherals under one or more simple-bus nodes. > > > > > > Rob > > > > > > > Do you mean need to add simple-bus like this? > > Yes. We remove soc because Matthias suggested it in former MTK SoC maybe in 2015 year. We will add it back by your comment. Thank you. Best Regards, Erin > > > > > + soc: soc { > > + #address-cells = <0x1>; > > + #size-cells = <0x1>; > > + ranges = <0 0 0 0xffffffff>; > > + compatible = "simple-bus"; > > > > soc_data: soc_data@08000000 { > > compatible = "mediatek,mt8183-efuse", > > "mediatek,efuse"; > > reg = <0 0x08000000 0 0x0010>; > > #address-cells = <1>; > > #size-cells = <1>; > > status = "disabled"; > > }; > > > > gic: interrupt-controller@0c000000 { > > compatible = "arm,gic-v3"; > > #interrupt-cells = <4>; > > > > Best Regards, > > Erin > > > > > _______________________________________________ > > > Linux-mediatek mailing list > > > Linux-mediatek@lists.infradead.org > > > http://lists.infradead.org/mailman/listinfo/linux-mediatek > > > > > > > > _______________________________________________ > > linux-arm-kernel mailing list > > linux-arm-kernel@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel