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Subject: Re: [PATCH 2/2] clk: meson: Add G12A AO Clock + Reset Controller
From:   Stephen Boyd <sboyd@kernel.org>
Message-ID: <154940510132.169292.12584338453129084603@swboyd.mtv.corp.google.com>
Cc:     Neil Armstrong <narmstrong@baylibre.com>,
        linux-clk@vger.kernel.org, linux-amlogic@lists.infradead.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
References: <20190204091331.9298-1-narmstrong@baylibre.com> <20190204091331.9298-3-narmstrong@baylibre.com>
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To:     Neil Armstrong <narmstrong@baylibre.com>, jbrunet@baylibre.com
In-Reply-To: <20190204091331.9298-3-narmstrong@baylibre.com>
Date:   Tue, 05 Feb 2019 14:18:21 -0800
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Quoting Neil Armstrong (2019-02-04 01:13:30)
> + * Register offsets from the data sheet must be multiplied by 4.
> + */
> +#define AO_RTI_STATUS_REG3     0x0C
> +#define AO_RTI_PWR_CNTL_REG0   0x10
> +#define AO_RTI_GEN_CNTL_REG0   0x40
> +#define AO_CLK_GATE0           0x4c
> +#define AO_CLK_GATE0_SP                0x50
> +#define AO_OSCIN_CNTL          0x58
> +#define AO_CEC_CLK_CNTL_REG0   0x74
> +#define AO_CEC_CLK_CNTL_REG1   0x78
> +#define AO_SAR_CLK             0x90
> +#define AO_RTC_ALT_CLK_CNTL0   0x94
> +#define AO_RTC_ALT_CLK_CNTL1   0x98
> +
> +#define AXG_AO_GATE(_name, _reg, _bit)                                 \
> +static struct clk_regmap g12a_aoclk_##_name =3D {                       =
         \
> +       .data =3D &(struct clk_regmap_gate_data) {                       =
 \
> +               .offset =3D (_reg),                                      =
 \
> +               .bit_idx =3D (_bit),                                     =
 \
> +       },                                                              \
> +       .hw.init =3D &(struct clk_init_data) {                           =
 \
> +               .name =3D  "g12a_ao_" #_name,                            =
 \
> +               .ops =3D &clk_regmap_gate_ops,                           =
 \
> +               .parent_names =3D (const char *[]){ IN_PREFIX "mpeg-clk" =
}, \
> +               .num_parents =3D 1,                                      =
 \
> +               .flags =3D CLK_IGNORE_UNUSED,                            =
 \

Can you please add a comment explaining why CLK_IGNORE_UNUSED is here?
It will help future readers know what's going on with this special flag.