From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2FA4CA9EB9 for ; Tue, 22 Oct 2019 16:57:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9B41320B7C for ; Tue, 22 Oct 2019 16:57:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=zoho.com header.i=zhouyanjie@zoho.com header.b="H5v82ber" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732163AbfJVQ53 (ORCPT ); Tue, 22 Oct 2019 12:57:29 -0400 Received: from sender4-pp-o94.zoho.com ([136.143.188.94]:25481 "EHLO sender4-pp-o94.zoho.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730432AbfJVQ53 (ORCPT ); Tue, 22 Oct 2019 12:57:29 -0400 ARC-Seal: i=1; a=rsa-sha256; t=1571763434; cv=none; d=zohomail.com; s=zohoarc; b=M8q7o16W1kXOwWkXsHtwkp1d64oLK0x80u0QNx4g+SSFh9k/y3Fa033pI2cFeKQO3MMJOei8mrA/StN/nCXngoo4rtR/pB/G4i8MZJIKepg4Gx8p7MSUe/dsQ9tRQqzi0KNwPGzWGkC22iNx9847k2Ea8CYaLLlMUxt4WK5JcNI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1571763434; h=Cc:Date:From:In-Reply-To:Message-ID:References:Subject:To; bh=sH4pFGkuzyCP+VL37dW8fs+vDrXjNK/N8LMxlk9kxLI=; b=atOTcVm+Ix8TBdR68nkfyFmgaQR2qwBCbFjZoi1LMQuKnx+ZYyhzO8M1jWyqvE/nul9pJn92XFXjQoVhdXBXcycHsQvjeHmJkxwEplLEWPJQIJmwlZs6/Iuz1/YAF6nhNXRWlSTbytvelVDhaCNwxfOSJPWKgRbFJphTdp2o4JY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=zoho.com; spf=pass smtp.mailfrom=zhouyanjie@zoho.com; dmarc=pass header.from= header.from= DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=zapps768; d=zoho.com; h=from:to:cc:subject:date:message-id:in-reply-to:references; b=l9n9G8zfh2jZMsqk+hkBKf23qT7AT9h3pkN4qmqCwzK9D11OxLXeeN9i8rgrz1uTR9fHZSTRTjqG jL6zqcoPiwqgaffNS15PDAwqem4Cp+F/hDGiftTW5kU1SH5jIiev DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1571763434; s=zm2019; d=zoho.com; i=zhouyanjie@zoho.com; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; l=2381; bh=sH4pFGkuzyCP+VL37dW8fs+vDrXjNK/N8LMxlk9kxLI=; b=H5v82berFLzENWm05F600Yex5DQiA1OuTonOyrbHsywDRiryO6RraCnN2tTZ4DBg xB4Ahe3vPGOHM0ZzD2I26Il2fELdlnp2/PSqO3IDEVTE2OS7Wee1Kq/v8gJ5Sp77Cc3 RRGkE6qe4nt3l4gZYswYSNvM85vIzd7Di0HjJwaw= Received: from localhost.localdomain (171.221.113.199 [171.221.113.199]) by mx.zohomail.com with SMTPS id 1571763432874296.28309854644885; Tue, 22 Oct 2019 09:57:12 -0700 (PDT) From: Zhou Yanjie To: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, paul.burton@mips.com, mturquette@baylibre.com, sboyd@kernel.org, mark.rutland@arm.com, paul@crapouillou.net Subject: [PATCH 1/2 v2] dt-bindings: clock: Add X1000 bindings. Date: Wed, 23 Oct 2019 00:56:28 +0800 Message-Id: <1571763389-43443-2-git-send-email-zhouyanjie@zoho.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1571763389-43443-1-git-send-email-zhouyanjie@zoho.com> References: <1571421006-12771-1-git-send-email-zhouyanjie@zoho.com> <1571763389-43443-1-git-send-email-zhouyanjie@zoho.com> X-ZohoMailClient: External Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add the clock bindings for the X1000 Soc from Ingenic. Signed-off-by: Zhou Yanjie --- .../devicetree/bindings/clock/ingenic,cgu.txt | 1 + include/dt-bindings/clock/x1000-cgu.h | 41 ++++++++++++++++++++++ 2 files changed, 42 insertions(+) create mode 100644 include/dt-bindings/clock/x1000-cgu.h diff --git a/Documentation/devicetree/bindings/clock/ingenic,cgu.txt b/Documentation/devicetree/bindings/clock/ingenic,cgu.txt index ba5a442..75598e6 100644 --- a/Documentation/devicetree/bindings/clock/ingenic,cgu.txt +++ b/Documentation/devicetree/bindings/clock/ingenic,cgu.txt @@ -11,6 +11,7 @@ Required properties: * ingenic,jz4725b-cgu * ingenic,jz4770-cgu * ingenic,jz4780-cgu + * ingenic,x1000-cgu - reg : The address & length of the CGU registers. - clocks : List of phandle & clock specifiers for clocks external to the CGU. Two such external clocks should be specified - first the external crystal diff --git a/include/dt-bindings/clock/x1000-cgu.h b/include/dt-bindings/clock/x1000-cgu.h new file mode 100644 index 00000000..f0a1496 --- /dev/null +++ b/include/dt-bindings/clock/x1000-cgu.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides clock numbers for the ingenic,x1000-cgu DT binding. + * + * They are roughly ordered as: + * - external clocks + * - PLLs + * - muxes/dividers in the order they appear in the x1000 programmers manual + * - gates in order of their bit in the CLKGR* registers + */ + +#ifndef __DT_BINDINGS_CLOCK_X1000_CGU_H__ +#define __DT_BINDINGS_CLOCK_X1000_CGU_H__ + +#define X1000_CLK_EXCLK 0 +#define X1000_CLK_RTCLK 1 +#define X1000_CLK_APLL 2 +#define X1000_CLK_MPLL 3 +#define X1000_CLK_SCLKA 4 +#define X1000_CLK_CPUMUX 5 +#define X1000_CLK_CPU 6 +#define X1000_CLK_L2CACHE 7 +#define X1000_CLK_AHB0 8 +#define X1000_CLK_AHB2PMUX 9 +#define X1000_CLK_AHB2 10 +#define X1000_CLK_PCLK 11 +#define X1000_CLK_DDR 12 +#define X1000_CLK_MAC 13 +#define X1000_CLK_MSCMUX 14 +#define X1000_CLK_MSC0 15 +#define X1000_CLK_MSC1 16 +#define X1000_CLK_SSIPLL 17 +#define X1000_CLK_SSIMUX 18 +#define X1000_CLK_SFC 19 +#define X1000_CLK_UART0 20 +#define X1000_CLK_UART1 21 +#define X1000_CLK_UART2 22 +#define X1000_CLK_SSI 23 +#define X1000_CLK_PDMA 24 + +#endif /* __DT_BINDINGS_CLOCK_X1000_CGU_H__ */ -- 2.7.4