[PATCH 0/3] clk: imx: avoid modify dram pll and improve for pll14xx

[PATCH 0/3] clk: imx: avoid modify dram pll and improve for pll14xx

[Peng Fan]

From: Peng Fan <peng.fan@nxp.com>

Dram PLL is expected to be modified in ATF, so we should
only provide recalc_rate hooks for the PLL.

To avoid add more entries in the pll14xx driver, we could introduce
imx_clk_hw_pll14xx_flags to pass flags.

Peng Fan (3):
  clk: imx: pll14xx: avoid modify dram pll
  clk: imx: pll14xx: introduce imx_clk_hw_pll14xx_flags
  clk: imx: imx8m: use imx_clk_hw_pll14xx_flags for dram pll

 drivers/clk/imx/clk-imx8mm.c  |  2 +-
 drivers/clk/imx/clk-imx8mn.c  |  2 +-
 drivers/clk/imx/clk-pll14xx.c | 24 +++++++++++++++---------
 drivers/clk/imx/clk.h         | 17 +++++++++++++----
 4 files changed, 30 insertions(+), 15 deletions(-)

-- 
2.16.4

[PATCH 1/3] clk: imx: pll14xx: avoid modify dram pll

[Peng Fan]

From: Peng Fan <peng.fan@nxp.com>

The dram pll is only expected to be modified in firmware,
so we should only support read clk frequency in Linux Kernel.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/imx/clk-pll14xx.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
index 5b0519a81a7a..9288b21d4d59 100644
--- a/drivers/clk/imx/clk-pll14xx.c
+++ b/drivers/clk/imx/clk-pll14xx.c
@@ -69,8 +69,6 @@ struct imx_pll14xx_clk imx_1443x_pll = {
 
 struct imx_pll14xx_clk imx_1443x_dram_pll = {
 	.type = PLL_1443X,
-	.rate_table = imx_pll1443x_tbl,
-	.rate_count = ARRAY_SIZE(imx_pll1443x_tbl),
 	.flags = CLK_GET_RATE_NOCACHE,
 };
 
@@ -376,6 +374,10 @@ static const struct clk_ops clk_pll1443x_ops = {
 	.set_rate	= clk_pll1443x_set_rate,
 };
 
+static const struct clk_ops clk_pll1443x_min_ops = {
+	.recalc_rate	= clk_pll1443x_recalc_rate,
+};
+
 struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
 				  void __iomem *base,
 				  const struct imx_pll14xx_clk *pll_clk)
@@ -403,7 +405,10 @@ struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
 			init.ops = &clk_pll1416x_ops;
 		break;
 	case PLL_1443X:
-		init.ops = &clk_pll1443x_ops;
+		if (!pll_clk->rate_table)
+			init.ops = &clk_pll1443x_min_ops;
+		else
+			init.ops = &clk_pll1443x_ops;
 		break;
 	default:
 		pr_err("%s: Unknown pll type for pll clk %s\n",
-- 
2.16.4

Re: [PATCH 1/3] clk: imx: pll14xx: avoid modify dram pll

[Shawn Guo]

On Mon, Dec 30, 2019 at 09:13:00AM +0000, Peng Fan wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> The dram pll is only expected to be modified in firmware,
> so we should only support read clk frequency in Linux Kernel.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>

@Leonard, do you agree?

Shawn

> ---
>  drivers/clk/imx/clk-pll14xx.c | 11 ++++++++---
>  1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
> index 5b0519a81a7a..9288b21d4d59 100644
> --- a/drivers/clk/imx/clk-pll14xx.c
> +++ b/drivers/clk/imx/clk-pll14xx.c
> @@ -69,8 +69,6 @@ struct imx_pll14xx_clk imx_1443x_pll = {
>  
>  struct imx_pll14xx_clk imx_1443x_dram_pll = {
>  	.type = PLL_1443X,
> -	.rate_table = imx_pll1443x_tbl,
> -	.rate_count = ARRAY_SIZE(imx_pll1443x_tbl),
>  	.flags = CLK_GET_RATE_NOCACHE,
>  };
>  
> @@ -376,6 +374,10 @@ static const struct clk_ops clk_pll1443x_ops = {
>  	.set_rate	= clk_pll1443x_set_rate,
>  };
>  
> +static const struct clk_ops clk_pll1443x_min_ops = {
> +	.recalc_rate	= clk_pll1443x_recalc_rate,
> +};
> +
>  struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
>  				  void __iomem *base,
>  				  const struct imx_pll14xx_clk *pll_clk)
> @@ -403,7 +405,10 @@ struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
>  			init.ops = &clk_pll1416x_ops;
>  		break;
>  	case PLL_1443X:
> -		init.ops = &clk_pll1443x_ops;
> +		if (!pll_clk->rate_table)
> +			init.ops = &clk_pll1443x_min_ops;
> +		else
> +			init.ops = &clk_pll1443x_ops;
>  		break;
>  	default:
>  		pr_err("%s: Unknown pll type for pll clk %s\n",
> -- 
> 2.16.4
> 

Re: [PATCH 1/3] clk: imx: pll14xx: avoid modify dram pll

[Leonard Crestez]

On 12.01.2020 04:33, Shawn Guo wrote:
> On Mon, Dec 30, 2019 at 09:13:00AM +0000, Peng Fan wrote:
>> From: Peng Fan <peng.fan@nxp.com>
>>
>> The dram pll is only expected to be modified in firmware,
>> so we should only support read clk frequency in Linux Kernel.
>>
>> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> 
> @Leonard, do you agree?

I'm not sure this improves anything.

As far as I understand the only way this could be a problem is if a 
driver deliberately does clk_set_rate on the dram pll and this shouldn't 
happen.

There is an infinite number of ways for clock consumers to break the 
system by manipulating clocks and providers don't need to guard against 
every scenario.

>> ---
>>   drivers/clk/imx/clk-pll14xx.c | 11 ++++++++---
>>   1 file changed, 8 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
>> index 5b0519a81a7a..9288b21d4d59 100644
>> --- a/drivers/clk/imx/clk-pll14xx.c
>> +++ b/drivers/clk/imx/clk-pll14xx.c
>> @@ -69,8 +69,6 @@ struct imx_pll14xx_clk imx_1443x_pll = {
>>   
>>   struct imx_pll14xx_clk imx_1443x_dram_pll = {
>>   	.type = PLL_1443X,
>> -	.rate_table = imx_pll1443x_tbl,
>> -	.rate_count = ARRAY_SIZE(imx_pll1443x_tbl),
>>   	.flags = CLK_GET_RATE_NOCACHE,
>>   };
>>   
>> @@ -376,6 +374,10 @@ static const struct clk_ops clk_pll1443x_ops = {
>>   	.set_rate	= clk_pll1443x_set_rate,
>>   };
>>   
>> +static const struct clk_ops clk_pll1443x_min_ops = {
>> +	.recalc_rate	= clk_pll1443x_recalc_rate,
>> +};
>> +
>>   struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
>>   				  void __iomem *base,
>>   				  const struct imx_pll14xx_clk *pll_clk)
>> @@ -403,7 +405,10 @@ struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
>>   			init.ops = &clk_pll1416x_ops;
>>   		break;
>>   	case PLL_1443X:
>> -		init.ops = &clk_pll1443x_ops;
>> +		if (!pll_clk->rate_table)
>> +			init.ops = &clk_pll1443x_min_ops;
>> +		else
>> +			init.ops = &clk_pll1443x_ops;
>>   		break;
>>   	default:
>>   		pr_err("%s: Unknown pll type for pll clk %s\n",

[PATCH 2/3] clk: imx: pll14xx: introduce imx_clk_hw_pll14xx_flags

[Peng Fan]

From: Peng Fan <peng.fan@nxp.com>

imx_clk_hw_pll14xx_flags is intended to provide flexiblity when
add flags for clks, no need to add more imx_pll14xx_clk entries
in clk-pll14xx.c.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/imx/clk-pll14xx.c | 10 ++++++----
 drivers/clk/imx/clk.h         | 15 ++++++++++++---
 2 files changed, 18 insertions(+), 7 deletions(-)

diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
index 9288b21d4d59..030159dc4884 100644
--- a/drivers/clk/imx/clk-pll14xx.c
+++ b/drivers/clk/imx/clk-pll14xx.c
@@ -378,9 +378,11 @@ static const struct clk_ops clk_pll1443x_min_ops = {
 	.recalc_rate	= clk_pll1443x_recalc_rate,
 };
 
-struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
-				  void __iomem *base,
-				  const struct imx_pll14xx_clk *pll_clk)
+struct clk_hw *imx_clk_hw_pll14xx_flags(const char *name,
+					const char *parent_name,
+					void __iomem *base,
+					const struct imx_pll14xx_clk *pll_clk,
+					unsigned long flags)
 {
 	struct clk_pll14xx *pll;
 	struct clk_hw *hw;
@@ -393,7 +395,7 @@ struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
 		return ERR_PTR(-ENOMEM);
 
 	init.name = name;
-	init.flags = pll_clk->flags;
+	init.flags = pll_clk->flags | flags;
 	init.parent_names = &parent_name;
 	init.num_parents = 1;
 
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index 65d80c675aa9..35a9d294b6df 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -131,9 +131,18 @@ struct clk *imx_clk_pll14xx(const char *name, const char *parent_name,
 #define imx_clk_pll14xx(name, parent_name, base, pll_clk) \
 	to_clk(imx_clk_hw_pll14xx(name, parent_name, base, pll_clk))
 
-struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
-				  void __iomem *base,
-				  const struct imx_pll14xx_clk *pll_clk);
+struct clk_hw *imx_clk_hw_pll14xx_flags(const char *name,
+					const char *parent_name,
+					void __iomem *base,
+					const struct imx_pll14xx_clk *pll_clk,
+					unsigned long flags);
+
+static inline struct clk_hw *imx_clk_hw_pll14xx(const char *name,
+		const char *parent_name, void __iomem *base,
+		const struct imx_pll14xx_clk *pll_clk)
+{
+	return imx_clk_hw_pll14xx_flags(name, parent_name, base, pll_clk, 0);
+}
 
 struct clk_hw *imx_clk_hw_pllv1(enum imx_pllv1_type type, const char *name,
 		const char *parent, void __iomem *base);
-- 
2.16.4

[PATCH 3/3] clk: imx: imx8m: use imx_clk_hw_pll14xx_flags for dram pll

[Peng Fan]

From: Peng Fan <peng.fan@nxp.com>

Use imx_clk_hw_pll14xx_flags for dram pll.
Modify imx_1443x_dram_pll to imx_1443x_dram_readonly, because dram pll
is not expected to be modified from Linux.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/imx/clk-imx8mm.c  | 2 +-
 drivers/clk/imx/clk-imx8mn.c  | 2 +-
 drivers/clk/imx/clk-pll14xx.c | 3 +--
 drivers/clk/imx/clk.h         | 2 +-
 4 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index 2ed93fc25087..55862652b19f 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -337,7 +337,7 @@ static int imx8mm_clocks_probe(struct platform_device *pdev)
 	hws[IMX8MM_AUDIO_PLL1] = imx_clk_hw_pll14xx("audio_pll1", "audio_pll1_ref_sel", base, &imx_1443x_pll);
 	hws[IMX8MM_AUDIO_PLL2] = imx_clk_hw_pll14xx("audio_pll2", "audio_pll2_ref_sel", base + 0x14, &imx_1443x_pll);
 	hws[IMX8MM_VIDEO_PLL1] = imx_clk_hw_pll14xx("video_pll1", "video_pll1_ref_sel", base + 0x28, &imx_1443x_pll);
-	hws[IMX8MM_DRAM_PLL] = imx_clk_hw_pll14xx("dram_pll", "dram_pll_ref_sel", base + 0x50, &imx_1443x_dram_pll);
+	hws[IMX8MM_DRAM_PLL] = imx_clk_hw_pll14xx_flags("dram_pll", "dram_pll_ref_sel", base + 0x50, &imx_1443x_pll_readonly, CLK_GET_RATE_NOCACHE);
 	hws[IMX8MM_GPU_PLL] = imx_clk_hw_pll14xx("gpu_pll", "gpu_pll_ref_sel", base + 0x64, &imx_1416x_pll);
 	hws[IMX8MM_VPU_PLL] = imx_clk_hw_pll14xx("vpu_pll", "vpu_pll_ref_sel", base + 0x74, &imx_1416x_pll);
 	hws[IMX8MM_ARM_PLL] = imx_clk_hw_pll14xx("arm_pll", "arm_pll_ref_sel", base + 0x84, &imx_1416x_pll);
diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
index c5e7316b4c66..e4710d3cf3e0 100644
--- a/drivers/clk/imx/clk-imx8mn.c
+++ b/drivers/clk/imx/clk-imx8mn.c
@@ -334,7 +334,7 @@ static int imx8mn_clocks_probe(struct platform_device *pdev)
 	hws[IMX8MN_AUDIO_PLL1] = imx_clk_hw_pll14xx("audio_pll1", "audio_pll1_ref_sel", base, &imx_1443x_pll);
 	hws[IMX8MN_AUDIO_PLL2] = imx_clk_hw_pll14xx("audio_pll2", "audio_pll2_ref_sel", base + 0x14, &imx_1443x_pll);
 	hws[IMX8MN_VIDEO_PLL1] = imx_clk_hw_pll14xx("video_pll1", "video_pll1_ref_sel", base + 0x28, &imx_1443x_pll);
-	hws[IMX8MN_DRAM_PLL] = imx_clk_hw_pll14xx("dram_pll", "dram_pll_ref_sel", base + 0x50, &imx_1443x_dram_pll);
+	hws[IMX8MN_DRAM_PLL] = imx_clk_hw_pll14xx_flags("dram_pll", "dram_pll_ref_sel", base + 0x50, &imx_1443x_pll_readonly, CLK_GET_RATE_NOCACHE);
 	hws[IMX8MN_GPU_PLL] = imx_clk_hw_pll14xx("gpu_pll", "gpu_pll_ref_sel", base + 0x64, &imx_1416x_pll);
 	hws[IMX8MN_VPU_PLL] = imx_clk_hw_pll14xx("vpu_pll", "vpu_pll_ref_sel", base + 0x74, &imx_1416x_pll);
 	hws[IMX8MN_ARM_PLL] = imx_clk_hw_pll14xx("arm_pll", "arm_pll_ref_sel", base + 0x84, &imx_1416x_pll);
diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
index 030159dc4884..33236d8580a6 100644
--- a/drivers/clk/imx/clk-pll14xx.c
+++ b/drivers/clk/imx/clk-pll14xx.c
@@ -67,9 +67,8 @@ struct imx_pll14xx_clk imx_1443x_pll = {
 	.rate_count = ARRAY_SIZE(imx_pll1443x_tbl),
 };
 
-struct imx_pll14xx_clk imx_1443x_dram_pll = {
+struct imx_pll14xx_clk imx_1443x_pll_readonly = {
 	.type = PLL_1443X,
-	.flags = CLK_GET_RATE_NOCACHE,
 };
 
 struct imx_pll14xx_clk imx_1416x_pll = {
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index 35a9d294b6df..ea84d2993b57 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -53,7 +53,7 @@ struct imx_pll14xx_clk {
 
 extern struct imx_pll14xx_clk imx_1416x_pll;
 extern struct imx_pll14xx_clk imx_1443x_pll;
-extern struct imx_pll14xx_clk imx_1443x_dram_pll;
+extern struct imx_pll14xx_clk imx_1443x_pll_readonly;
 
 #define imx_clk_cpu(name, parent_name, div, mux, pll, step) \
 	to_clk(imx_clk_hw_cpu(name, parent_name, div, mux, pll, step))
-- 
2.16.4

Re: [PATCH 3/3] clk: imx: imx8m: use imx_clk_hw_pll14xx_flags for dram pll

[Shawn Guo]

On Mon, Dec 30, 2019 at 09:13:10AM +0000, Peng Fan wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> Use imx_clk_hw_pll14xx_flags for dram pll.
> Modify imx_1443x_dram_pll to imx_1443x_dram_readonly, because dram pll
> is not expected to be modified from Linux.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/clk/imx/clk-imx8mm.c  | 2 +-
>  drivers/clk/imx/clk-imx8mn.c  | 2 +-
>  drivers/clk/imx/clk-pll14xx.c | 3 +--
>  drivers/clk/imx/clk.h         | 2 +-
>  4 files changed, 4 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
> index 2ed93fc25087..55862652b19f 100644
> --- a/drivers/clk/imx/clk-imx8mm.c
> +++ b/drivers/clk/imx/clk-imx8mm.c
> @@ -337,7 +337,7 @@ static int imx8mm_clocks_probe(struct platform_device *pdev)
>  	hws[IMX8MM_AUDIO_PLL1] = imx_clk_hw_pll14xx("audio_pll1", "audio_pll1_ref_sel", base, &imx_1443x_pll);
>  	hws[IMX8MM_AUDIO_PLL2] = imx_clk_hw_pll14xx("audio_pll2", "audio_pll2_ref_sel", base + 0x14, &imx_1443x_pll);
>  	hws[IMX8MM_VIDEO_PLL1] = imx_clk_hw_pll14xx("video_pll1", "video_pll1_ref_sel", base + 0x28, &imx_1443x_pll);
> -	hws[IMX8MM_DRAM_PLL] = imx_clk_hw_pll14xx("dram_pll", "dram_pll_ref_sel", base + 0x50, &imx_1443x_dram_pll);
> +	hws[IMX8MM_DRAM_PLL] = imx_clk_hw_pll14xx_flags("dram_pll", "dram_pll_ref_sel", base + 0x50, &imx_1443x_pll_readonly, CLK_GET_RATE_NOCACHE);
>  	hws[IMX8MM_GPU_PLL] = imx_clk_hw_pll14xx("gpu_pll", "gpu_pll_ref_sel", base + 0x64, &imx_1416x_pll);
>  	hws[IMX8MM_VPU_PLL] = imx_clk_hw_pll14xx("vpu_pll", "vpu_pll_ref_sel", base + 0x74, &imx_1416x_pll);
>  	hws[IMX8MM_ARM_PLL] = imx_clk_hw_pll14xx("arm_pll", "arm_pll_ref_sel", base + 0x84, &imx_1416x_pll);
> diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
> index c5e7316b4c66..e4710d3cf3e0 100644
> --- a/drivers/clk/imx/clk-imx8mn.c
> +++ b/drivers/clk/imx/clk-imx8mn.c
> @@ -334,7 +334,7 @@ static int imx8mn_clocks_probe(struct platform_device *pdev)
>  	hws[IMX8MN_AUDIO_PLL1] = imx_clk_hw_pll14xx("audio_pll1", "audio_pll1_ref_sel", base, &imx_1443x_pll);
>  	hws[IMX8MN_AUDIO_PLL2] = imx_clk_hw_pll14xx("audio_pll2", "audio_pll2_ref_sel", base + 0x14, &imx_1443x_pll);
>  	hws[IMX8MN_VIDEO_PLL1] = imx_clk_hw_pll14xx("video_pll1", "video_pll1_ref_sel", base + 0x28, &imx_1443x_pll);
> -	hws[IMX8MN_DRAM_PLL] = imx_clk_hw_pll14xx("dram_pll", "dram_pll_ref_sel", base + 0x50, &imx_1443x_dram_pll);
> +	hws[IMX8MN_DRAM_PLL] = imx_clk_hw_pll14xx_flags("dram_pll", "dram_pll_ref_sel", base + 0x50, &imx_1443x_pll_readonly, CLK_GET_RATE_NOCACHE);
>  	hws[IMX8MN_GPU_PLL] = imx_clk_hw_pll14xx("gpu_pll", "gpu_pll_ref_sel", base + 0x64, &imx_1416x_pll);
>  	hws[IMX8MN_VPU_PLL] = imx_clk_hw_pll14xx("vpu_pll", "vpu_pll_ref_sel", base + 0x74, &imx_1416x_pll);
>  	hws[IMX8MN_ARM_PLL] = imx_clk_hw_pll14xx("arm_pll", "arm_pll_ref_sel", base + 0x84, &imx_1416x_pll);
> diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
> index 030159dc4884..33236d8580a6 100644
> --- a/drivers/clk/imx/clk-pll14xx.c
> +++ b/drivers/clk/imx/clk-pll14xx.c
> @@ -67,9 +67,8 @@ struct imx_pll14xx_clk imx_1443x_pll = {
>  	.rate_count = ARRAY_SIZE(imx_pll1443x_tbl),
>  };
>  
> -struct imx_pll14xx_clk imx_1443x_dram_pll = {
> +struct imx_pll14xx_clk imx_1443x_pll_readonly = {
>  	.type = PLL_1443X,
> -	.flags = CLK_GET_RATE_NOCACHE,

Not really sure what we gain from creating a new function and moving the
flag from here to there.  I'm personally not fond of it.

Shawn

>  };
>  
>  struct imx_pll14xx_clk imx_1416x_pll = {
> diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
> index 35a9d294b6df..ea84d2993b57 100644
> --- a/drivers/clk/imx/clk.h
> +++ b/drivers/clk/imx/clk.h
> @@ -53,7 +53,7 @@ struct imx_pll14xx_clk {
>  
>  extern struct imx_pll14xx_clk imx_1416x_pll;
>  extern struct imx_pll14xx_clk imx_1443x_pll;
> -extern struct imx_pll14xx_clk imx_1443x_dram_pll;
> +extern struct imx_pll14xx_clk imx_1443x_pll_readonly;
>  
>  #define imx_clk_cpu(name, parent_name, div, mux, pll, step) \
>  	to_clk(imx_clk_hw_cpu(name, parent_name, div, mux, pll, step))
> -- 
> 2.16.4
>