From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: <skomatineni@nvidia.com>, <thierry.reding@gmail.com>,
<jonathanh@nvidia.com>, <broonie@kernel.org>,
<lgirdwood@gmail.com>, <perex@perex.cz>, <tiwai@suse.com>,
<digetx@gmail.com>, <mperttunen@nvidia.com>,
<gregkh@linuxfoundation.org>, <sboyd@kernel.org>,
<robh+dt@kernel.org>, <mark.rutland@arm.com>
Cc: <pdeschrijver@nvidia.com>, <pgaikwad@nvidia.com>,
<spujar@nvidia.com>, <josephl@nvidia.com>,
<daniel.lezcano@linaro.org>, <mmaddireddy@nvidia.com>,
<markz@nvidia.com>, <devicetree@vger.kernel.org>,
<linux-clk@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH v7 04/21] clk: tegra: Add Tegra OSC to clock lookup
Date: Tue, 7 Jan 2020 20:24:58 -0800 [thread overview]
Message-ID: <1578457515-3477-5-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1578457515-3477-1-git-send-email-skomatineni@nvidia.com>
OSC is one of the parent for Tegra clocks clk_out_1, clk_out_2,
and clk_out_3.
So, this patch adds Tegra OSC to clock lookup.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
drivers/clk/tegra/clk-id.h | 1 +
drivers/clk/tegra/clk-tegra-fixed.c | 5 +++++
drivers/clk/tegra/clk-tegra114.c | 2 ++
drivers/clk/tegra/clk-tegra124.c | 2 ++
drivers/clk/tegra/clk-tegra210.c | 2 ++
drivers/clk/tegra/clk-tegra30.c | 2 ++
6 files changed, 14 insertions(+)
diff --git a/drivers/clk/tegra/clk-id.h b/drivers/clk/tegra/clk-id.h
index 1bf21766d3e8..cf42e5995794 100644
--- a/drivers/clk/tegra/clk-id.h
+++ b/drivers/clk/tegra/clk-id.h
@@ -44,6 +44,7 @@ enum clk_id {
tegra_clk_clk72Mhz,
tegra_clk_clk72Mhz_8,
tegra_clk_clk_m,
+ tegra_clk_osc,
tegra_clk_osc_div2,
tegra_clk_osc_div4,
tegra_clk_clk_out_1,
diff --git a/drivers/clk/tegra/clk-tegra-fixed.c b/drivers/clk/tegra/clk-tegra-fixed.c
index 8304f8cf9dd2..205d1a6d3e77 100644
--- a/drivers/clk/tegra/clk-tegra-fixed.c
+++ b/drivers/clk/tegra/clk-tegra-fixed.c
@@ -46,7 +46,12 @@ int __init tegra_osc_clk_init(void __iomem *clk_base, struct tegra_clk *clks,
return -EINVAL;
}
+ dt_clk = tegra_lookup_dt_id(tegra_clk_osc, clks);
+ if (!dt_clk)
+ return 0;
+
osc = clk_register_fixed_rate(NULL, "osc", NULL, 0, *osc_freq);
+ *dt_clk = osc;
dt_clk = tegra_lookup_dt_id(tegra_clk_clk_m, clks);
if (!dt_clk)
diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c
index 9d2ca387114c..180ddc2abfd2 100644
--- a/drivers/clk/tegra/clk-tegra114.c
+++ b/drivers/clk/tegra/clk-tegra114.c
@@ -735,6 +735,7 @@ static struct tegra_clk tegra114_clks[tegra_clk_max] __initdata = {
[tegra_clk_fuse_burn] = { .dt_id = TEGRA114_CLK_FUSE_BURN, .present = true },
[tegra_clk_clk_32k] = { .dt_id = TEGRA114_CLK_CLK_32K, .present = true },
[tegra_clk_clk_m] = { .dt_id = TEGRA114_CLK_CLK_M, .present = true },
+ [tegra_clk_osc] = { .dt_id = TEGRA114_CLK_OSC, .present = true },
[tegra_clk_osc_div2] = { .dt_id = TEGRA114_CLK_OSC_DIV2, .present = true },
[tegra_clk_osc_div4] = { .dt_id = TEGRA114_CLK_OSC_DIV4, .present = true },
[tegra_clk_pll_ref] = { .dt_id = TEGRA114_CLK_PLL_REF, .present = true },
@@ -815,6 +816,7 @@ static struct tegra_devclk devclks[] __initdata = {
{ .con_id = "clk_m", .dt_id = TEGRA114_CLK_CLK_M },
{ .con_id = "pll_ref", .dt_id = TEGRA114_CLK_PLL_REF },
{ .con_id = "clk_32k", .dt_id = TEGRA114_CLK_CLK_32K },
+ { .con_id = "osc", .dt_id = TEGRA114_CLK_OSC },
{ .con_id = "osc_div2", .dt_id = TEGRA114_CLK_OSC_DIV2 },
{ .con_id = "osc_div4", .dt_id = TEGRA114_CLK_OSC_DIV4 },
{ .con_id = "pll_c", .dt_id = TEGRA114_CLK_PLL_C },
diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c
index 15f42718f4cb..7a16e50eb20f 100644
--- a/drivers/clk/tegra/clk-tegra124.c
+++ b/drivers/clk/tegra/clk-tegra124.c
@@ -860,6 +860,7 @@ static struct tegra_clk tegra124_clks[tegra_clk_max] __initdata = {
[tegra_clk_fuse_burn] = { .dt_id = TEGRA124_CLK_FUSE_BURN, .present = true },
[tegra_clk_clk_32k] = { .dt_id = TEGRA124_CLK_CLK_32K, .present = true },
[tegra_clk_clk_m] = { .dt_id = TEGRA124_CLK_CLK_M, .present = true },
+ [tegra_clk_osc] = { .dt_id = TEGRA124_CLK_OSC, .present = true },
[tegra_clk_osc_div2] = { .dt_id = TEGRA124_CLK_OSC_DIV2, .present = true },
[tegra_clk_osc_div4] = { .dt_id = TEGRA124_CLK_OSC_DIV4, .present = true },
[tegra_clk_pll_ref] = { .dt_id = TEGRA124_CLK_PLL_REF, .present = true },
@@ -941,6 +942,7 @@ static struct tegra_devclk devclks[] __initdata = {
{ .con_id = "clk_m", .dt_id = TEGRA124_CLK_CLK_M },
{ .con_id = "pll_ref", .dt_id = TEGRA124_CLK_PLL_REF },
{ .con_id = "clk_32k", .dt_id = TEGRA124_CLK_CLK_32K },
+ { .con_id = "osc", .dt_id = TEGRA124_CLK_OSC },
{ .con_id = "osc_div2", .dt_id = TEGRA124_CLK_OSC_DIV2 },
{ .con_id = "osc_div4", .dt_id = TEGRA124_CLK_OSC_DIV4 },
{ .con_id = "pll_c", .dt_id = TEGRA124_CLK_PLL_C },
diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
index 5687fcda620e..45d54ead30bc 100644
--- a/drivers/clk/tegra/clk-tegra210.c
+++ b/drivers/clk/tegra/clk-tegra210.c
@@ -2371,6 +2371,7 @@ static struct tegra_clk tegra210_clks[tegra_clk_max] __initdata = {
[tegra_clk_fuse_burn] = { .dt_id = TEGRA210_CLK_FUSE_BURN, .present = true },
[tegra_clk_clk_32k] = { .dt_id = TEGRA210_CLK_CLK_32K, .present = true },
[tegra_clk_clk_m] = { .dt_id = TEGRA210_CLK_CLK_M, .present = true },
+ [tegra_clk_osc] = { .dt_id = TEGRA210_CLK_OSC, .present = true },
[tegra_clk_osc_div2] = { .dt_id = TEGRA210_CLK_OSC_DIV2, .present = true },
[tegra_clk_osc_div4] = { .dt_id = TEGRA210_CLK_OSC_DIV4, .present = true },
[tegra_clk_pll_ref] = { .dt_id = TEGRA210_CLK_PLL_REF, .present = true },
@@ -2497,6 +2498,7 @@ static struct tegra_devclk devclks[] __initdata = {
{ .con_id = "clk_m", .dt_id = TEGRA210_CLK_CLK_M },
{ .con_id = "pll_ref", .dt_id = TEGRA210_CLK_PLL_REF },
{ .con_id = "clk_32k", .dt_id = TEGRA210_CLK_CLK_32K },
+ { .con_id = "osc", .dt_id = TEGRA210_CLK_OSC },
{ .con_id = "osc_div2", .dt_id = TEGRA210_CLK_OSC_DIV2 },
{ .con_id = "osc_div4", .dt_id = TEGRA210_CLK_OSC_DIV4 },
{ .con_id = "pll_c", .dt_id = TEGRA210_CLK_PLL_C },
diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
index 1322188edb72..ddc5ab66d09e 100644
--- a/drivers/clk/tegra/clk-tegra30.c
+++ b/drivers/clk/tegra/clk-tegra30.c
@@ -581,6 +581,7 @@ static struct tegra_devclk devclks[] __initdata = {
{ .con_id = "twd", .dt_id = TEGRA30_CLK_TWD },
{ .con_id = "emc", .dt_id = TEGRA30_CLK_EMC },
{ .con_id = "clk_32k", .dt_id = TEGRA30_CLK_CLK_32K },
+ { .con_id = "osc", .dt_id = TEGRA30_CLK_OSC },
{ .con_id = "osc_div2", .dt_id = TEGRA30_CLK_OSC_DIV2 },
{ .con_id = "osc_div4", .dt_id = TEGRA30_CLK_OSC_DIV4 },
{ .con_id = "cml0", .dt_id = TEGRA30_CLK_CML0 },
@@ -683,6 +684,7 @@ static struct tegra_devclk devclks[] __initdata = {
static struct tegra_clk tegra30_clks[tegra_clk_max] __initdata = {
[tegra_clk_clk_32k] = { .dt_id = TEGRA30_CLK_CLK_32K, .present = true },
[tegra_clk_clk_m] = { .dt_id = TEGRA30_CLK_CLK_M, .present = true },
+ [tegra_clk_osc] = { .dt_id = TEGRA30_CLK_OSC, .present = true },
[tegra_clk_osc_div2] = { .dt_id = TEGRA30_CLK_OSC_DIV2, .present = true },
[tegra_clk_osc_div4] = { .dt_id = TEGRA30_CLK_OSC_DIV4, .present = true },
[tegra_clk_pll_ref] = { .dt_id = TEGRA30_CLK_PLL_REF, .present = true },
--
2.7.4
next prev parent reply other threads:[~2020-01-08 4:26 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-08 4:24 [PATCH v7 00/21] Move PMC clocks into Tegra PMC driver Sowjanya Komatineni
2020-01-08 4:24 ` [PATCH v7 01/21] dt-bindings: clock: tegra: Change CLK_M_DIV to OSC_DIV clocks Sowjanya Komatineni
2020-01-08 4:24 ` [PATCH v7 02/21] clk: tegra: Change CLK_M_DIV clocks " Sowjanya Komatineni
2020-01-08 4:24 ` [PATCH v7 03/21] dt-bindings: clock: tegra: Add DT id for OSC clock Sowjanya Komatineni
2020-01-08 19:18 ` Dmitry Osipenko
2020-01-13 22:03 ` Rob Herring
2020-01-08 4:24 ` Sowjanya Komatineni [this message]
2020-01-08 19:18 ` [PATCH v7 04/21] clk: tegra: Add Tegra OSC to clock lookup Dmitry Osipenko
2020-01-08 4:24 ` [PATCH v7 05/21] clk: tegra: Fix Tegra PMC clock out parents Sowjanya Komatineni
2020-01-08 8:34 ` Nicolas Chauvet
2020-01-09 17:18 ` Sowjanya Komatineni
2020-01-09 19:45 ` Dmitry Osipenko
2020-01-08 4:25 ` [PATCH v7 06/21] dt-bindings: tegra: Convert Tegra PMC bindings to YAML Sowjanya Komatineni
2020-01-13 22:30 ` Rob Herring
2020-01-08 4:25 ` [PATCH v7 07/21] dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings Sowjanya Komatineni
2020-01-08 4:25 ` [PATCH v7 08/21] soc: tegra: Add Tegra PMC clocks registration into PMC driver Sowjanya Komatineni
2020-01-08 4:25 ` [PATCH v7 09/21] dt-bindings: soc: tegra-pmc: Add id for Tegra PMC 32KHz blink clock Sowjanya Komatineni
2020-01-08 4:25 ` [PATCH v7 10/21] soc: tegra: Add support for " Sowjanya Komatineni
2020-01-08 4:25 ` [PATCH v7 11/21] clk: tegra: Remove tegra_pmc_clk_init along with clk ids Sowjanya Komatineni
2020-01-08 4:25 ` [PATCH v7 12/21] dt-bindings: clock: tegra: Remove pmc clock ids from clock dt-bindings Sowjanya Komatineni
2020-01-08 4:25 ` [PATCH v7 13/21] ASoC: tegra: Use device managed resource APIs to get the clock Sowjanya Komatineni
2020-01-08 5:26 ` Sameer Pujar
2020-01-08 4:25 ` [PATCH v7 14/21] ASoC: tegra: Add audio mclk configuration Sowjanya Komatineni
2020-01-08 5:15 ` Sameer Pujar
2020-01-08 4:25 ` [PATCH v7 15/21] ASoC: tegra: Add fallback implementation for audio mclk Sowjanya Komatineni
2020-01-08 5:34 ` Sameer Pujar
2020-01-08 5:48 ` Sowjanya Komatineni
2020-01-08 6:28 ` Sameer Pujar
[not found] ` <745b8c7b-4fe3-c9ea-284e-b89546e8ad87@nvidia.com>
[not found] ` <705edf9b-d1bc-8090-017e-fa4ad445f9fb@nvidia.com>
2020-01-10 22:05 ` Dmitry Osipenko
2020-01-10 22:13 ` Sowjanya Komatineni
2020-01-10 23:02 ` Dmitry Osipenko
2020-01-10 23:14 ` Sowjanya Komatineni
2020-01-11 15:32 ` Dmitry Osipenko
2020-01-08 4:25 ` [PATCH v7 16/21] clk: tegra: Remove audio related clock enables from init_table Sowjanya Komatineni
2020-01-08 4:25 ` [PATCH v7 17/21] ARM: dts: tegra: Add clock-cells property to pmc Sowjanya Komatineni
2020-01-08 4:25 ` [PATCH v7 18/21] arm64: tegra: Add clock-cells property to Tegra PMC node Sowjanya Komatineni
2020-01-08 4:25 ` [PATCH v7 19/21] ARM: tegra: Update sound node clocks in device tree Sowjanya Komatineni
2020-01-08 4:25 ` [PATCH v7 20/21] arm64: tegra: smaug: Change clk_out_2 provider to pmc Sowjanya Komatineni
2020-01-08 4:25 ` [PATCH v7 21/21] ASoC: nau8825: change Tegra clk_out_2 provider to tegra_pmc Sowjanya Komatineni
2020-01-09 19:44 ` [PATCH v7 00/21] Move PMC clocks into Tegra PMC driver Dmitry Osipenko
2020-01-10 1:39 ` Sowjanya Komatineni
2020-01-10 3:24 ` Sowjanya Komatineni
2020-01-10 3:32 ` Sowjanya Komatineni
2020-01-10 4:36 ` Sowjanya Komatineni
2020-01-10 4:43 ` Sameer Pujar
2020-01-10 4:47 ` Sowjanya Komatineni
2020-01-10 14:54 ` Dmitry Osipenko
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