From: Stephen Boyd <sboyd@kernel.org>
To: Geert Uytterhoeven <geert+renesas@glider.be>,
Mark Rutland <mark.rutland@arm.com>,
Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
linux-renesas-soc@vger.kernel.org,
Geert Uytterhoeven <geert+renesas@glider.be>
Subject: Re: [PATCH] dt-bindings: clock: renesas: cpg-mssr: Convert to json-schema
Date: Tue, 25 Feb 2020 09:02:14 -0800 [thread overview]
Message-ID: <158265013473.177367.4512247165308399202@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20200224152640.1318-1-geert+renesas@glider.be>
Quoting Geert Uytterhoeven (2020-02-24 07:26:40)
> diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml
> new file mode 100644
> index 0000000000000000..dfbd1933f1bc56de
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml
> @@ -0,0 +1,204 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/clock/renesas,cpg-mssr.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Renesas Clock Pulse Generator / Module Standby and Software Reset
> +
> +maintainers:
> + - Geert Uytterhoeven <geert+renesas@glider.be>
> +
> +description: |
> + On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse Generator)
> + and MSSR (Module Standby and Software Reset) blocks are intimately connected,
> + and share the same register block.
> +
> + They provide the following functionalities:
> + - The CPG block generates various core clocks,
> + - The MSSR block provides two functions:
> + 1. Module Standby, providing a Clock Domain to control the clock supply
> + to individual SoC devices,
> + 2. Reset Control, to perform a software reset of individual SoC devices.
> +
> +properties:
> + compatible:
> + enum:
> + - renesas,r7s9210-cpg-mssr # RZ/A2
> + - renesas,r8a7743-cpg-mssr # RZ/G1M
> + - renesas,r8a7744-cpg-mssr # RZ/G1N
> + - renesas,r8a7745-cpg-mssr # RZ/G1E
> + - renesas,r8a77470-cpg-mssr # RZ/G1C
> + - renesas,r8a774a1-cpg-mssr # RZ/G2M
> + - renesas,r8a774b1-cpg-mssr # RZ/G2N
> + - renesas,r8a774c0-cpg-mssr # RZ/G2E
> + - renesas,r8a7790-cpg-mssr # R-Car H2
> + - renesas,r8a7791-cpg-mssr # R-Car M2-W
> + - renesas,r8a7792-cpg-mssr # R-Car V2H
> + - renesas,r8a7793-cpg-mssr # R-Car M2-N
> + - renesas,r8a7794-cpg-mssr # R-Car E2
> + - renesas,r8a7795-cpg-mssr # R-Car H3
> + - renesas,r8a7796-cpg-mssr # R-Car M3-W
> + - renesas,r8a77961-cpg-mssr # R-Car M3-W+
> + - renesas,r8a77965-cpg-mssr # R-Car M3-N
> + - renesas,r8a77970-cpg-mssr # R-Car V3M
> + - renesas,r8a77980-cpg-mssr # R-Car V3H
> + - renesas,r8a77990-cpg-mssr # R-Car E3
> + - renesas,r8a77995-cpg-mssr # R-Car D3
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + minItems: 1
> + maxItems: 2
> +
> + clock-names:
> + minItems: 1
> + maxItems: 2
Do we need this here and also below? Why can't it just be below with the
more specific constraints?
> +
> + '#clock-cells':
> + description: |
> + - For CPG core clocks, the two clock specifier cells must be "CPG_CORE"
> + and a core clock reference, as defined in
> + <dt-bindings/clock/*-cpg-mssr.h>
> + - For module clocks, the two clock specifier cells must be "CPG_MOD" and
> + a module number, as defined in the datasheet.
> + const: 2
> +
> + '#power-domain-cells':
> + description:
> + SoC devices that are part of the CPG/MSSR Clock Domain and can be
> + power-managed through Module Standby should refer to the CPG device node
> + in their "power-domains" property, as documented by the generic PM Domain
> + bindings in Documentation/devicetree/bindings/power/power-domain.yaml.
> + const: 0
> +
> + '#reset-cells':
> + description:
> + The single reset specifier cell must be the module number, as defined in
> + the datasheet.
> + const: 1
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + items:
> + enum:
> + - renesas,r7s9210-cpg-mssr
> + - renesas,r8a774c0-cpg-mssr
> + - renesas,r8a7792-cpg-mssr
> + - renesas,r8a77990-cpg-mssr
> + - renesas,r8a77995-cpg-mssr
> +
> + then:
> + properties:
> + clock:
> + maxItems: 1
> + clock-names:
> + maxItems: 1
> + items:
> + - const: extal
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - renesas,r8a7743-cpg-mssr
> + - renesas,r8a7744-cpg-mssr
> + - renesas,r8a7745-cpg-mssr
> + - renesas,r8a77470-cpg-mssr
> + - renesas,r8a7790-cpg-mssr
> + - renesas,r8a7791-cpg-mssr
> + - renesas,r8a7793-cpg-mssr
> + - renesas,r8a7794-cpg-mssr
> +
> + then:
> + properties:
> + clock:
> + minItems: 2
> + clock-names:
> + minItems: 2
> + items:
> + - const: extal
> + - const: usb_extal
> +
> + - if:
> + properties:
> + compatible:
> + items:
> + enum:
> + - renesas,r8a774a1-cpg-mssr
> + - renesas,r8a774b1-cpg-mssr
> + - renesas,r8a7795-cpg-mssr
> + - renesas,r8a7796-cpg-mssr
> + - renesas,r8a77961-cpg-mssr
> + - renesas,r8a77965-cpg-mssr
> + - renesas,r8a77970-cpg-mssr
> + - renesas,r8a77980-cpg-mssr
> +
> + then:
> + properties:
> + clock:
> + minItems: 2
> + clock-names:
> + minItems: 2
> + items:
> + - const: extal
> + - const: extalr
> +
> + - if:
> + not:
> + properties:
> + compatible:
> + items:
> + enum:
> + - renesas,r7s9210-cpg-mssr
> + then:
> + required:
> + - '#reset-cells'
It may make sense to split this binding up into multiple bindings so
that we don't have deeply nested if/else/then.
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - '#clock-cells'
> + - '#power-domain-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + // CPG device node:
> +
> + cpg: clock-controller@e6150000 {
> + compatible = "renesas,r8a7795-cpg-mssr";
> + reg = <0xe6150000 0x1000>;
> + clocks = <&extal_clk>, <&extalr_clk>;
> + clock-names = "extal", "extalr";
> + #clock-cells = <2>;
> + #power-domain-cells = <0>;
> + #reset-cells = <1>;
> + };
> +
> + - |
> + // CPG/MSSR Clock Domain member device node:
> + #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + scif2: serial@e6e88000 {
> + compatible = "renesas,scif-r8a7795", "renesas,rcar-gen3-scif",
> + "renesas,scif";
> + reg = <0xe6e88000 64>;
> + interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 310>, <&cpg CPG_CORE R8A7795_CLK_S3D1>,
> + <&scif_clk>;
> + clock-names = "fck";
> + dmas = <&dmac1 0x13>, <&dmac1 0x12>, <&dmac2 0x13>, <&dmac2 0x12>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&cpg>;
> + resets = <&cpg 310>;
> + };
I'm not sure we need this in the example.
next prev parent reply other threads:[~2020-02-25 17:02 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-24 15:26 [PATCH] dt-bindings: clock: renesas: cpg-mssr: Convert to json-schema Geert Uytterhoeven
2020-02-25 17:02 ` Stephen Boyd [this message]
2020-02-27 11:12 ` Geert Uytterhoeven
2020-03-02 20:26 ` Rob Herring
2020-03-03 8:08 ` Geert Uytterhoeven
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