From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: <skomatineni@nvidia.com>, <thierry.reding@gmail.com>,
<jonathanh@nvidia.com>, <frankc@nvidia.com>, <hverkuil@xs4all.nl>,
<helen.koike@collabora.com>
Cc: <digetx@gmail.com>, <sboyd@kernel.org>,
<linux-media@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-clk@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: [RFC PATCH v5 9/9] arm64: tegra: Add Tegra VI CSI support in device tree
Date: Mon, 23 Mar 2020 10:52:35 -0700 [thread overview]
Message-ID: <1584985955-19101-10-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1584985955-19101-1-git-send-email-skomatineni@nvidia.com>
Tegra210 contains VI controller for video input capture from MIPI
CSI camera sensors and also supports built-in test pattern generator.
CSI ports can be one-to-one mapped to VI channels for capturing from
an external sensor or from built-in test pattern generator.
This patch adds support for VI and CSI and enables them in Tegra210
device tree.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 10 ++++++
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 45 +++++++++++++++++++++++++-
2 files changed, 54 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
index 313a4c2..b57d837 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
@@ -14,6 +14,16 @@
status = "okay";
};
+ vi@54080000 {
+ status = "okay";
+
+ avdd-dsi-csi-supply = <&vdd_dsi_csi>;
+
+ csi@838 {
+ status = "okay";
+ };
+ };
+
sor@54580000 {
status = "okay";
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 5b1dfd8..2deba87 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -137,9 +137,43 @@
vi@54080000 {
compatible = "nvidia,tegra210-vi";
- reg = <0x0 0x54080000 0x0 0x00040000>;
+ reg = <0x0 0x54080000 0x0 0x700>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
+ assigned-clocks = <&tegra_car TEGRA210_CLK_VI>;
+ assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>;
+
+ clocks = <&tegra_car TEGRA210_CLK_VI>;
+ clock-names = "vi";
+ power-domains = <&pd_venc>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ ranges = <0x0 0x0 0x54080000 0x2000>;
+
+ csi@838 {
+ compatible = "nvidia,tegra210-csi";
+ reg = <0x838 0x1300>;
+ status = "disabled";
+ assigned-clocks = <&tegra_car TEGRA210_CLK_CILAB>,
+ <&tegra_car TEGRA210_CLK_CILCD>,
+ <&tegra_car TEGRA210_CLK_CILE>;
+ assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_P>,
+ <&tegra_car TEGRA210_CLK_PLL_P>,
+ <&tegra_car TEGRA210_CLK_PLL_P>;
+ assigned-clock-rates = <102000000>,
+ <102000000>,
+ <102000000>;
+
+ clocks = <&tegra_car TEGRA210_CLK_CSI>,
+ <&tegra_car TEGRA210_CLK_CILAB>,
+ <&tegra_car TEGRA210_CLK_CILCD>,
+ <&tegra_car TEGRA210_CLK_CILE>;
+ clock-names = "csi", "cilab", "cilcd", "cile";
+ power-domains = <&pd_sor>;
+ };
+
};
tsec@54100000 {
@@ -839,6 +873,15 @@
reset-names = "vic";
#power-domain-cells = <0>;
};
+
+ pd_venc: venc {
+ clocks = <&tegra_car TEGRA210_CLK_VI>,
+ <&tegra_car TEGRA210_CLK_CSI>;
+ resets = <&mc TEGRA210_MC_RESET_VI>,
+ <&tegra_car TEGRA210_RST_VI>,
+ <&tegra_car TEGRA210_CLK_CSI>;
+ #power-domain-cells = <0>;
+ };
};
sdmmc1_3v3: sdmmc1-3v3 {
--
2.7.4
next prev parent reply other threads:[~2020-03-23 17:52 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-23 17:52 [RFC PATCH v5 0/9] Add Tegra driver for video capture Sowjanya Komatineni
2020-03-23 17:52 ` [RFC PATCH v5 1/9] arm64: tegra: Fix sor powergate clocks and reset Sowjanya Komatineni
2020-03-23 17:52 ` [RFC PATCH v5 2/9] arm64: tegra: Add reset-cells to mc Sowjanya Komatineni
2020-03-23 17:52 ` [RFC PATCH v5 3/9] dt-bindings: clock: tegra: Add clk id for CSI TPG clock Sowjanya Komatineni
2020-03-23 17:52 ` [RFC PATCH v5 4/9] clk: tegra: Add Tegra210 CSI TPG clock gate Sowjanya Komatineni
2020-03-23 17:52 ` [RFC PATCH v5 5/9] dt-binding: tegra: Add VI and CSI bindings Sowjanya Komatineni
2020-03-24 19:20 ` Dmitry Osipenko
2020-03-24 21:16 ` Sowjanya Komatineni
2020-03-23 17:52 ` [RFC PATCH v5 6/9] media: tegra: Add Tegra210 Video input driver Sowjanya Komatineni
2020-03-25 0:34 ` Dmitry Osipenko
2020-03-25 1:08 ` Sowjanya Komatineni
2020-03-25 1:15 ` Sowjanya Komatineni
2020-03-25 19:43 ` Dmitry Osipenko
[not found] ` <20200325110358.GB853@valkosipuli.retiisi.org.uk>
2020-03-25 11:09 ` Hans Verkuil
[not found] ` <a219aeb2-3d00-016e-eed9-503a9fbd0d13@nvidia.com>
2020-03-26 14:48 ` Sakari Ailus
2020-03-26 17:04 ` Sowjanya Komatineni
2020-03-30 10:59 ` Hans Verkuil
2020-03-31 10:32 ` Sakari Ailus
2020-03-31 10:56 ` Hans Verkuil
2020-03-31 11:10 ` Sakari Ailus
2020-03-31 11:27 ` Hans Verkuil
2020-03-31 11:52 ` Laurent Pinchart
2020-03-31 16:40 ` Sowjanya Komatineni
2020-03-31 18:33 ` Sowjanya Komatineni
2020-04-01 16:36 ` Sowjanya Komatineni
2020-04-01 16:58 ` Laurent Pinchart
2020-04-01 18:24 ` Sowjanya Komatineni
2020-04-03 7:36 ` Sowjanya Komatineni
2020-03-23 17:52 ` [RFC PATCH v5 7/9] MAINTAINERS: Add Tegra Video driver section Sowjanya Komatineni
2020-03-23 17:52 ` [RFC PATCH v5 8/9] dt-bindings: reset: Add ID for Tegra210 VI reset Sowjanya Komatineni
2020-03-23 17:52 ` Sowjanya Komatineni [this message]
2020-03-24 19:19 ` [RFC PATCH v5 9/9] arm64: tegra: Add Tegra VI CSI support in device tree Dmitry Osipenko
2020-03-24 21:04 ` Sowjanya Komatineni
2020-03-24 22:48 ` Dmitry Osipenko
2020-03-25 0:01 ` Sowjanya Komatineni
2020-03-25 0:22 ` Dmitry Osipenko
2020-03-30 10:04 ` [RFC PATCH v5 0/9] Add Tegra driver for video capture Hans Verkuil
2020-03-30 11:02 ` Hans Verkuil
2020-03-30 16:16 ` Sowjanya Komatineni
2020-04-03 5:45 ` Sowjanya Komatineni
2020-04-03 7:19 ` Hans Verkuil
2020-04-03 7:31 ` Sowjanya Komatineni
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