From: Taniya Das <tdas@codeaurora.org>
To: "Stephen Boyd" <sboyd@kernel.org>,
"Michael Turquette " <mturquette@baylibre.com>
Cc: David Brown <david.brown@linaro.org>,
Rajendra Nayak <rnayak@codeaurora.org>,
linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
Andy Gross <agross@kernel.org>,
devicetree@vger.kernel.org, robh@kernel.org, robh+dt@kernel.org,
cychiang@google.com, Taniya Das <tdas@codeaurora.org>
Subject: [PATCH] arm64: dts: qcom: sc7180: Add LPASS clock controller nodes
Date: Wed, 15 Jul 2020 12:25:49 +0530 [thread overview]
Message-ID: <1594796149-14778-1-git-send-email-tdas@codeaurora.org> (raw)
Update the clock controller nodes for Low power audio subsystem
functionality.
Signed-off-by: Taniya Das <tdas@codeaurora.org>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 2be81a2..8c30a17 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/clock/qcom,dispcc-sc7180.h>
#include <dt-bindings/clock/qcom,gcc-sc7180.h>
#include <dt-bindings/clock/qcom,gpucc-sc7180.h>
+#include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,videocc-sc7180.h>
#include <dt-bindings/interconnect/qcom,osm-l3.h>
@@ -2136,6 +2137,27 @@
};
};
+ lpasscc: clock-controller@62d00000 {
+ compatible = "qcom,sc7180-lpasscorecc";
+ reg = <0 0x62d00000 0 0x50000>,
+ <0 0x62780000 0 0x30000>;
+ reg-names = "lpass_core_cc", "lpass_audio_cc";
+ clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>;
+ clock-names = "iface";
+ power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>;
+ #clock-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+
+ lpass_hm: clock-controller@63000000 {
+ compatible = "qcom,sc7180-lpasshm";
+ reg = <0 0x63000000 0 0x28>;
+ clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>;
+ clock-names = "iface";
+ #clock-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+
etm@7040000 {
compatible = "arm,coresight-etm4x", "arm,primecell";
reg = <0 0x07040000 0 0x1000>;
--
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member
of the Code Aurora Forum, hosted by the Linux Foundation.
next reply other threads:[~2020-07-15 6:56 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-15 6:55 Taniya Das [this message]
2020-07-16 17:34 ` [PATCH] arm64: dts: qcom: sc7180: Add LPASS clock controller nodes Doug Anderson
2020-07-31 20:38 ` Doug Anderson
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