Re: [PATCH v2 00/16] clk: st: embed clock outputs within drivers

[Stephen Boyd <sboyd@kernel.org>]

Quoting Alain Volmat (2021-03-25 00:50:02)
> Most of ST clock drivers used by STi platform are updated in
> order to introduce clock outputs informations within each drivers
> and thus allow to avoid having to rely on clock-output-names properties
> within DT clock nodes.
> For that purpose, drivers are updated to allow handling both modes
> (with or without clock-output-names).
> Once all DT will have been updated, the legacy mode could be removed
> from the drivers.
> This will also allow, once all STi DT will be corrected, to remove the
> of_clk_detect_critical API from clk core code since STi clock drivers
> are the only drivers using this API.
> 
> This serie also contains modifications within STi DTS in order to use
> the newly introduced compatible and remove clock-output-names
> properties.

Can you split the dts changes from the driver changes and only send the
clk driver changes to clk maintainers? I don't intend to apply dts file
changes to the clk tree. Those can go via arm-soc based on some
immutable branch that lives in clk tree until next merge window closes.

> 
> Alain Volmat (16):
>   clk: st: clkgen-pll: remove used variable of struct clkgen_pll
>   clk: st: flexgen: embed soc clock outputs within compatible data
>   dt-bindings: clock: st: flexgen: add new introduced compatible
>   clk: st: clkgen-pll: embed soc clock outputs within compatible data
>   dt-bindings: clock: st: clkgen-pll: add new introduced compatible
>   clk: st: clkgen-fsyn: embed soc clock outputs within compatible data
>   dt-bindings: clock: st: clkgen-fsyn: add new introduced compatible
>   ARM: dts: sti: update flexgen compatible within stih418-clock
>   ARM: dts: sti: update flexgen compatible within stih407-clock
>   ARM: dts: sti: update flexgen compatible within stih410-clock
>   ARM: dts: sti: update clkgen-pll entries in stih407-clock
>   ARM: dts: sti: update clkgen-pll entries in stih410-clock
>   ARM: dts: sti: update clkgen-pll entries in stih418-clock
>   ARM: dts: sti: update clkgen-fsyn entries in stih407-clock
>   ARM: dts: sti: update clkgen-fsyn entries in stih410-clock
>   ARM: dts: sti: update clkgen-fsyn entries in stih418-clock
> 
>  .../bindings/clock/st/st,clkgen-pll.txt       |   3 +
>  .../bindings/clock/st/st,flexgen.txt          |  10 +
>  .../bindings/clock/st/st,quadfs.txt           |   3 +
>  arch/arm/boot/dts/stih407-clock.dtsi          | 128 +------
>  arch/arm/boot/dts/stih410-clock.dtsi          | 138 +------
>  arch/arm/boot/dts/stih418-clock.dtsi          | 136 +------
>  drivers/clk/st/clk-flexgen.c                  | 344 +++++++++++++++++-
>  drivers/clk/st/clkgen-fsyn.c                  | 113 +++++-
>  drivers/clk/st/clkgen-pll.c                   | 121 +++++-
>  9 files changed, 588 insertions(+), 408 deletions(-)
> 
> ---
> v2: fix drivers to update some clocks as CLK_IS_CRITICAL
> 

Please document in the code why CLK_IS_CRITICAL is used. For example,
"This clk needs to be on so the CPU can keep fetching instructions from
memory" or something like that.