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From: Heiko Stuebner <>
To: Kever Yang <>,
	Elaine Zhang <>,
	Peter Geis <>, Stephen Boyd <>,
	Michael Turquette <>
Cc: Heiko Stuebner <>,,,,
Subject: Re: [PATCH] clk: rockchip: fix rk3568 cpll clk gate bits
Date: Mon, 24 May 2021 01:51:10 +0200	[thread overview]
Message-ID: <> (raw)
In-Reply-To: <>

On Wed, 19 May 2021 13:41:49 -0400, Peter Geis wrote:
> The cpll clk gate bits had an ordering issue. This led to the loss of
> the boot sdmmc controller when the gmac was shut down with:
> `ip link set eth0 down`
> as the cpll_100m was shut off instead of the cpll_62p5.
> cpll_62p5, cpll_50m, cpll_25m were all off by one with cpll_100m
> misplaced.
> [...]

Applied, thanks!

[1/1] clk: rockchip: fix rk3568 cpll clk gate bits
      commit: 2f3877d609e7951ef96d24979eb9d163f1f004f8

Best regards,
Heiko Stuebner <>

      parent reply	other threads:[~2021-05-23 23:51 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-19 17:41 Peter Geis
2021-05-20  1:26 ` elaine.zhang
2021-05-23 23:51 ` Heiko Stuebner [this message]

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