From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99485C282DB for ; Fri, 1 Feb 2019 15:44:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 66F7E20855 for ; Fri, 1 Feb 2019 15:44:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="UCcTSHtq" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730714AbfBAPnJ (ORCPT ); Fri, 1 Feb 2019 10:43:09 -0500 Received: from mail-lf1-f67.google.com ([209.85.167.67]:33009 "EHLO mail-lf1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730290AbfBAPnH (ORCPT ); Fri, 1 Feb 2019 10:43:07 -0500 Received: by mail-lf1-f67.google.com with SMTP id i26so5421215lfc.0 for ; Fri, 01 Feb 2019 07:43:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6Z4BLOysdiax7MmotMn3MzsppFr/+7u52EIpu5QtmCQ=; b=UCcTSHtqQyZnzSq/YCVjITgW9SL+rYOWamwIZt/a5GRcUvNWOJ5KLBekDrH+KyPWaE ROZmEU5+1wuoPb0TpLjEW9suvFeBv6eR2IRCFJMuBkouqkqNBTM98+nOSDHM+51yU9mT rgz821U034S3Ug+MUGsGWw2oGIQzV2Xt5nh50= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6Z4BLOysdiax7MmotMn3MzsppFr/+7u52EIpu5QtmCQ=; b=X2aywgT+pgzMMm9AQJ/kZ/I+3GtMQT2U9HN/GJCSJDRbYM0B2rnXzQsOPRT4Q+ER+g 0jJ2iahe/bgCdwTBnQXj0FIFVBVlK53vIDRIBMVgi/4eXBth3nxC/AtEd4s3prBvqzPG yDXU9E5E61TkwgmfOogMbn6Pkw6fHpyspGULdB5hZlnix+ZtQFAXWYksW6YIeOr6HRkh sATYxF3dcNhnl/yCTqeaE1MYazjBXtDLuMd6KyV47SyJ42XqKH+KDe7FOivrdsldZiHT ndba+32wc9fw6a/QICE8G4tMIol5XML4lyd6CBsZDq912OQjbtLh5yzyhUIRJPAIumZ5 m5Hw== X-Gm-Message-State: AHQUAuYEqYOzAYLGrEdOgoRhYsxmUKsatxWsdwUSmSG5nbQ1kdTIjUeE coezJFe69duyEx0ldBc86UPgJQ== X-Google-Smtp-Source: AHgI3IbtqSTHpuA1aj1DJ/6/kF0i3pJ6sxisD5EjqO/e0D8GaujIUdZrlwN79CvMYK7jeQLgGsFonA== X-Received: by 2002:a19:ae1a:: with SMTP id f26mr373674lfc.86.1549035785900; Fri, 01 Feb 2019 07:43:05 -0800 (PST) Received: from localhost.localdomain ([217.76.202.68]) by smtp.gmail.com with ESMTPSA id i13-v6sm1305712ljg.82.2019.02.01.07.43.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 01 Feb 2019 07:43:05 -0800 (PST) From: Jagan Teki To: Maxime Ripard , David Airlie , Daniel Vetter , Chen-Yu Tsai , Michael Turquette , Rob Herring , Mark Rutland Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, Michael Trimarchi , linux-amarula@amarulasolutions.com, linux-sunxi@googlegroups.com, Jagan Teki Subject: [PATCH v7 12/23] drm/sun4i: sun6i_mipi_dsi: Add support for VCC-DSI voltage regulator Date: Fri, 1 Feb 2019 21:12:21 +0530 Message-Id: <20190201154232.10505-13-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190201154232.10505-1-jagan@amarulasolutions.com> References: <20190201154232.10505-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Allwinner MIPI DSI controllers are supplied with SoC DSI power rails via VCC-DSI pin. Add support for this supply pin by adding voltage regulator handling code to MIPI DSI driver. Signed-off-by: Jagan Teki Tested-by: Merlijn Wajer --- drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 14 ++++++++++++++ drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h | 3 +++ 2 files changed, 17 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c index 3d7c03161954..9be414131460 100644 --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c @@ -1107,6 +1107,12 @@ static int sun6i_dsi_probe(struct platform_device *pdev) return PTR_ERR(base); } + dsi->regulator = devm_regulator_get(dev, "vcc-dsi"); + if (IS_ERR(dsi->regulator)) { + dev_err(dev, "Couldn't get VCC-DSI supply\n"); + return PTR_ERR(dsi->regulator); + } + dsi->regs = devm_regmap_init_mmio_clk(dev, "bus", base, &sun6i_dsi_regmap_config); if (IS_ERR(dsi->regs)) { @@ -1183,6 +1189,13 @@ static int sun6i_dsi_remove(struct platform_device *pdev) static int __maybe_unused sun6i_dsi_runtime_resume(struct device *dev) { struct sun6i_dsi *dsi = dev_get_drvdata(dev); + int err; + + err = regulator_enable(dsi->regulator); + if (err) { + dev_err(dsi->dev, "failed to enable VCC-DSI supply: %d\n", err); + return err; + } reset_control_deassert(dsi->reset); clk_prepare_enable(dsi->mod_clk); @@ -1215,6 +1228,7 @@ static int __maybe_unused sun6i_dsi_runtime_suspend(struct device *dev) clk_disable_unprepare(dsi->mod_clk); reset_control_assert(dsi->reset); + regulator_disable(dsi->regulator); return 0; } diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h index 257cca660da0..06cce0d0d3ad 100644 --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h @@ -13,6 +13,8 @@ #include #include +#include + struct sun6i_dphy { struct clk *bus_clk; struct clk *mod_clk; @@ -28,6 +30,7 @@ struct sun6i_dsi { struct clk *bus_clk; struct clk *mod_clk; struct regmap *regs; + struct regulator *regulator; struct reset_control *reset; struct sun6i_dphy *dphy; -- 2.18.0.321.gffc6fa0e3