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From: Simon Horman <horms@verge.net.au>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
	Magnus Damm <magnus.damm@gmail.com>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	Fabrizio Castro <fabrizio.castro@bp.renesas.com>,
	Biju Das <biju.das@bp.renesas.com>
Subject: Re: [PATCH v3 2/5] clk: renesas: rcar-gen3: Parameterise Z and Z2 clock offset
Date: Tue, 5 Feb 2019 16:14:10 +0100
Message-ID: <20190205151410.bqr7dpz6ws2lttzf@verge.net.au> (raw)
In-Reply-To: <CAMuHMdWjv6rL5dNe3n3MZWynQ3eYT57gTM7ZrDyQ8EDZO=C+UA@mail.gmail.com>

On Tue, Feb 05, 2019 at 03:55:08PM +0100, Geert Uytterhoeven wrote:
> Hi Simon,
> 
> On Tue, Feb 5, 2019 at 3:36 PM Simon Horman <horms@verge.net.au> wrote:
> > On Tue, Feb 05, 2019 at 11:48:06AM +0100, Geert Uytterhoeven wrote:
> > > On Thu, Jan 31, 2019 at 10:40 AM Simon Horman
> > > <horms+renesas@verge.net.au> wrote:
> > > > Parameterise the offset of control bits within the FRQCRC register
> > > > for Z and Z2 clocks.
> > > >
> > > > This is in preparation for supporting the Z2 clock on the R-Car E3
> > > > (r8a77990) SoC which uses a different offset for control bits to
> > > > other, already, supported SoCs.
> > > >
> > > > This mechanism should be extendable to other clocks, such as ZG,
> > > > f.e. by adding the number of control bits as a parameter to
> > > > cpg_z_clk_register().
> > > >
> > > > As suggested by Geert Uytterhoeven.
> > > >
> > > > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> > >
> > > > --- a/drivers/clk/renesas/rcar-gen3-cpg.c
> > > > +++ b/drivers/clk/renesas/rcar-gen3-cpg.c
> > >
> > > > @@ -568,14 +566,9 @@ struct clk * __init rcar_gen3_cpg_clk_register(struct device *dev,
> > > >                 break;
> > > >
> > > >         case CLK_TYPE_GEN3_Z:
> > > > -               return cpg_z_clk_register(core->name, __clk_get_name(parent),
> > > > -                                         base, CPG_FRQCRC_ZFC_MASK,
> > > > -                                         core->div);
> > > > -
> > > >         case CLK_TYPE_GEN3_Z2:
> > > >                 return cpg_z_clk_register(core->name, __clk_get_name(parent),
> > > > -                                         base, CPG_FRQCRC_Z2FC_MASK,
> > > > -                                         core->div);
> > > > +                                         base, core->div, core->offset);
> > >
> > > CLK_TYPE_GEN3_Z and CLK_TYPE_GEN3_Z2 are now the same type.
> > > Perhaps they can be merged completely, and be absorbed into the
> > > DEF_GEN3_Z() macro?
> > > Or not, depending on how ZG support will be added...
> >
> > Strange, I did have them merged locally and I think that is the right thing
> > to do, but some how this version got posted. I think that if they
> > subsequently need to be re-split then so be it. But lets not jump
> > to conclusions.
> >
> > I'll plan on posting v4 unless you object.
> 
> OK, eagerly awaiting an even more improved version!

Sorry, I was confused (as is often the case).

I think that removing the duplicate code, as I have above,
is the right thing to do at this point as I do entirely
expect the CLK_TYPE_GEN3_Z and CLK_TYPE_GEN3_Z2 cases
to diverge again when we add ZG support.

  reply index

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-31  9:40 [PATCH v3 0/5] clk: renesas: r8a77990: Add Z2 clock Simon Horman
2019-01-31  9:40 ` [PATCH v3 1/5] clk: renesas: rcar-gen3: Parameterise Z and Z2 clock fixed divisor Simon Horman
2019-02-05  9:28   ` Geert Uytterhoeven
2019-01-31  9:40 ` [PATCH v3 2/5] clk: renesas: rcar-gen3: Parameterise Z and Z2 clock offset Simon Horman
2019-02-05  9:28   ` Geert Uytterhoeven
2019-02-05 10:48   ` Geert Uytterhoeven
2019-02-05 14:35     ` Simon Horman
2019-02-05 14:55       ` Geert Uytterhoeven
2019-02-05 15:14         ` Simon Horman [this message]
2019-01-31  9:40 ` [PATCH v3 3/5] clk: renesas: rcar-gen3: Support Z and Z2 clocks with high frequency parents Simon Horman
2019-02-05  9:18   ` Geert Uytterhoeven
2019-01-31  9:40 ` [PATCH v3 4/5] clk: renesas: r8a77990: Add Z2 clock Simon Horman
2019-02-05  9:27   ` Geert Uytterhoeven
2019-01-31  9:40 ` [PATCH/RFT v3 5/5] clk: renesas: r8a774c0: " Simon Horman
2019-01-31 11:01   ` Fabrizio Castro
2019-02-05  9:27   ` Geert Uytterhoeven
2019-02-05  9:30 ` [PATCH v3 0/5] clk: renesas: r8a77990: " Geert Uytterhoeven

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