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From: Simon Horman <horms@verge.net.au>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
	Magnus Damm <magnus.damm@gmail.com>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	Fabrizio Castro <fabrizio.castro@bp.renesas.com>,
	Biju Das <biju.das@bp.renesas.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v4 3/5] clk: renesas: rcar-gen3: Support Z and Z2 clocks with high frequency parents
Date: Thu, 7 Feb 2019 16:22:46 +0100
Message-ID: <20190207152242.xzxfvojyyvsqhmtt@verge.net.au> (raw)
In-Reply-To: <CAMuHMdUMeGEnkVDvVk=NZMrnNXDUxDOgcqfORf+My8jkCza3SA@mail.gmail.com>

On Thu, Feb 07, 2019 at 04:05:58PM +0100, Geert Uytterhoeven wrote:
> Hi Simon,
> 
> On Thu, Feb 7, 2019 at 2:36 PM Simon Horman <horms+renesas@verge.net.au> wrote:
> > Support Z and Z2 clocks with parent frequencies greater than UINT32_MAX Hz
> > (~4.29GHz).
> >
> > The DIV_ROUND_CLOSEST_ULL() macro accepts a 64bit dividend and 32bit
> > divisor. This leads to truncation of the dividend, which is the Z or Z2
> 
> truncation of the divisor.
> 
> > parent clock frequency in HZ, on platforms where frequency of that clock is
> > greater than UINT32_MAX Hz.
> >
> > To resolve this problem the DIV64_U64_ROUND_CLOSEST() macro, which an
> 
> which takes an
> 
> > unsigned 32bit dividend and divisor, is introduced.
> 
> 64-bit
> 
> > An earlier version of this patch made use of the existing
> > DIV_ROUND_CLOSEST() macro, which accepts the prevailing type of the
> > dividend and divisor. However, this does not compile on 32bit systems, such
> > as i386 and mips, when called with the types used at this callsite, an
> > unsigned long long dividend and unsigned long divisor.
> 
> Thanks for fixing this!
> 
> > This work is in preparation for supporting the Z2 cloco on the R-Car Gen3
> > E3 (r8a77990) SoC which has a 4.8GHz parent clock.
> >
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> 
> With the above fixed:
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> 
> > ---
> > v4: Add and use DIV64_U64_ROUND_CLOSEST
> >
> > v2: New patch
> > ---
> >  drivers/clk/renesas/rcar-gen3-cpg.c |  4 ++--
> >  include/linux/math64.h              | 13 +++++++++++++
> 
> While I have no issue taking this change through the clk-renesas tree if
> Andrew provides his Acked-by, I think the introduction of
> DIV64_U64_ROUND_CLOSEST() should be a separate patch.
> 
> However, given commit 68600f623d69da42 ("mm: don't miss the last page
> because of round-off error") added both DIV64_U64_ROUND_UP() and its
> user under mm/, there's precedence for not splitting it off...

I also assumed a separate patch would be better,
but I found little evidence of that practice being
recently used in math64.h.

In any case, as I need to respin I'll break it out into
a separate patch.

  reply index

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-07 13:35 [PATCH v4 0/5] clk: renesas: r8a77990, r8a774c0: Add Z2 clock Simon Horman
2019-02-07 13:35 ` [PATCH v4 1/5] clk: renesas: rcar-gen3: Parameterise Z and Z2 clock fixed divisor Simon Horman
2019-02-07 13:35 ` [PATCH v4 2/5] clk: renesas: rcar-gen3: Parameterise Z and Z2 clock offset Simon Horman
2019-02-07 13:35 ` [PATCH v4 3/5] clk: renesas: rcar-gen3: Support Z and Z2 clocks with high frequency parents Simon Horman
2019-02-07 15:05   ` Geert Uytterhoeven
2019-02-07 15:22     ` Simon Horman [this message]
2019-02-07 13:35 ` [PATCH v4 4/5] clk: renesas: r8a77990: Add Z2 clock Simon Horman
2019-02-07 13:35 ` [PATCH v4 5/5] clk: renesas: r8a774c0: " Simon Horman

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