* sdhci-esdhc-imx/v5.0-rc5: i.MX50 system hangs when "per" clock is disabled @ 2019-02-07 22:52 Jonathan Neuschäfer 2019-02-08 0:50 ` Fabio Estevam 2019-02-10 21:32 ` Jonathan Neuschäfer 0 siblings, 2 replies; 5+ messages in thread From: Jonathan Neuschäfer @ 2019-02-07 22:52 UTC (permalink / raw) To: linux-clk, linux-mmc, linux-kernel Cc: linux-arm-kernel, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Michael Turquette, Stephen Boyd, Adrian Hunter, Ulf Hansson [-- Attachment #1: Type: text/plain, Size: 1052 bytes --] Hi, I'm currently porting mainline Linux to an i.MX507-based board (preliminary DT here[1]). Recently I've enabled esdhc1 in the devicetree. However, as soon as the mmc driver (sdhci-esdhc-imx.c) disables clk_per in sdhci_esdhc_runtime_suspend[2], the whole system locks up in some way. Booting with CONFIG_PM=n "fixes" the problem; commenting out the offending line in sdhci_esdhc_runtime_suspend lets the system survive, but leaves the MMC controller in an unusable state (of course it's not a proper solution anyway). I tried to compare the CCM's clocks between i.MX50 and i.MX53, but unfortunately, the i.MX50 reference manual doesn't have the table called "Output clocks from CCM". Does anyone have any ideas or patches that I could try in order to narrow the problem further down? Thanks, Jonathan Neuschäfer [1]: https://gist.github.com/neuschaefer/27cacf0acf5411219be9372d728d1163 [2]: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/mmc/host/sdhci-esdhc-imx.c?h=v5.0-rc5#n1412 [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 833 bytes --] ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: sdhci-esdhc-imx/v5.0-rc5: i.MX50 system hangs when "per" clock is disabled 2019-02-07 22:52 sdhci-esdhc-imx/v5.0-rc5: i.MX50 system hangs when "per" clock is disabled Jonathan Neuschäfer @ 2019-02-08 0:50 ` Fabio Estevam 2019-02-09 16:24 ` Jonathan Neuschäfer 2019-02-10 21:32 ` Jonathan Neuschäfer 1 sibling, 1 reply; 5+ messages in thread From: Fabio Estevam @ 2019-02-08 0:50 UTC (permalink / raw) To: Jonathan Neuschäfer Cc: linux-clk, linux-mmc, linux-kernel, Ulf Hansson, Stephen Boyd, Sascha Hauer, Adrian Hunter, NXP Linux Team, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo, Michael Turquette, moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE Hi Jonathan, On Thu, Feb 7, 2019 at 8:52 PM Jonathan Neuschäfer <j.neuschaefer@gmx.net> wrote: > > Hi, > > I'm currently porting mainline Linux to an i.MX507-based board > (preliminary DT here[1]). Recently I've enabled esdhc1 in the > devicetree. > > However, as soon as the mmc driver (sdhci-esdhc-imx.c) disables clk_per > in sdhci_esdhc_runtime_suspend[2], the whole system locks up in some way. > Booting with CONFIG_PM=n "fixes" the problem; commenting out the > offending line in sdhci_esdhc_runtime_suspend lets the system survive, > but leaves the MMC controller in an unusable state (of course it's not a > proper solution anyway). > > I tried to compare the CCM's clocks between i.MX50 and i.MX53, but > unfortunately, the i.MX50 reference manual doesn't have the table called > "Output clocks from CCM". Please check Table 5-10. CCM_CCGR3 Gated Clock Mapping to Target Module from the MX50 Referene Manual. > > Does anyone have any ideas or patches that I could try in order to > narrow the problem further down? Does the change below help? --- a/arch/arm/boot/dts/imx50.dtsi +++ b/arch/arm/boot/dts/imx50.dtsi @@ -102,7 +102,7 @@ reg = <0x50004000 0x4000>; interrupts = <1>; clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>, - <&clks IMX5_CLK_DUMMY>, + <&clks IMX5_CLK_ESDHC1_IPG_GATE>, <&clks IMX5_CLK_ESDHC1_PER_GATE>; clock-names = "ipg", "ahb", "per"; bus-width = <4>; @@ -114,7 +114,7 @@ reg = <0x50008000 0x4000>; interrupts = <2>; clocks = <&clks IMX5_CLK_ESDHC2_IPG_GATE>, - <&clks IMX5_CLK_DUMMY>, + <&clks IMX5_CLK_ESDHC2_IPG_GATE>, <&clks IMX5_CLK_ESDHC2_PER_GATE>; clock-names = "ipg", "ahb", "per"; bus-width = <4>; ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: sdhci-esdhc-imx/v5.0-rc5: i.MX50 system hangs when "per" clock is disabled 2019-02-08 0:50 ` Fabio Estevam @ 2019-02-09 16:24 ` Jonathan Neuschäfer 2019-02-09 17:15 ` Fabio Estevam 0 siblings, 1 reply; 5+ messages in thread From: Jonathan Neuschäfer @ 2019-02-09 16:24 UTC (permalink / raw) To: Fabio Estevam Cc: Jonathan Neuschäfer, linux-clk, linux-mmc, linux-kernel, Ulf Hansson, Stephen Boyd, Sascha Hauer, Adrian Hunter, NXP Linux Team, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo, Michael Turquette, moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE [-- Attachment #1: Type: text/plain, Size: 1827 bytes --] On Thu, Feb 07, 2019 at 10:50:28PM -0200, Fabio Estevam wrote: > On Thu, Feb 7, 2019 at 8:52 PM Jonathan Neuschäfer [...] > > I tried to compare the CCM's clocks between i.MX50 and i.MX53, but > > unfortunately, the i.MX50 reference manual doesn't have the table called > > "Output clocks from CCM". > > Please check Table 5-10. CCM_CCGR3 Gated Clock Mapping to Target > Module from the MX50 Referene Manual. Ok, the tables show: For i.MX50: [1:0] 0 ipg_clk_root eSDHCv2_1 [3:2] 1 esdhc1_clk_root eSDHCv2_1 For i.MX53: 1–0 CG0 esdhc1_ipg_hclk: affects ipg_clk and hclk inputs of ESDEHC-1 (esdhc1_clk_enable) 3–2 CG1 esdhc1_perclk: affects ipg_clk_perclk input of ESDEHC-1 (esdhc1_serial_clk_enable) Table 18-3 (Output clocks from CCM) in the iMX53RM shows that ESDHCv2-1's ipg_clk_perclk is esdhc1_clk_root, so the clock structure does seem to be the same here, between i.MX50 and i.MX53… (The reason why I looked at i.MX53 is that there are several i.MX53 boards in tree, so it appears to be well tested under mainline Linux) > Does the change below help? > > --- a/arch/arm/boot/dts/imx50.dtsi > +++ b/arch/arm/boot/dts/imx50.dtsi > @@ -102,7 +102,7 @@ > reg = <0x50004000 0x4000>; > interrupts = <1>; > clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>, > - <&clks IMX5_CLK_DUMMY>, > + <&clks IMX5_CLK_ESDHC1_IPG_GATE>, > <&clks IMX5_CLK_ESDHC1_PER_GATE>; > clock-names = "ipg", "ahb", "per"; Unfortunately, this doesn't help. Thanks, Jonathan Neuschäfer [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 833 bytes --] ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: sdhci-esdhc-imx/v5.0-rc5: i.MX50 system hangs when "per" clock is disabled 2019-02-09 16:24 ` Jonathan Neuschäfer @ 2019-02-09 17:15 ` Fabio Estevam 0 siblings, 0 replies; 5+ messages in thread From: Fabio Estevam @ 2019-02-09 17:15 UTC (permalink / raw) To: Jonathan Neuschäfer Cc: linux-clk, linux-mmc, linux-kernel, Ulf Hansson, Stephen Boyd, Sascha Hauer, Adrian Hunter, NXP Linux Team, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo, Michael Turquette, moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE On Sat, Feb 9, 2019 at 2:25 PM Jonathan Neuschäfer <j.neuschaefer@gmx.net> wrote: > > On Thu, Feb 07, 2019 at 10:50:28PM -0200, Fabio Estevam wrote: > > On Thu, Feb 7, 2019 at 8:52 PM Jonathan Neuschäfer > [...] > > > I tried to compare the CCM's clocks between i.MX50 and i.MX53, but > > > unfortunately, the i.MX50 reference manual doesn't have the table called > > > "Output clocks from CCM". > > > > Please check Table 5-10. CCM_CCGR3 Gated Clock Mapping to Target > > Module from the MX50 Referene Manual. > > Ok, the tables show: > > For i.MX50: > [1:0] 0 ipg_clk_root eSDHCv2_1 and it also shows that ahb_clk_root is controlled by these same bits. That's why I added the ahb entry in my suggestion. > [3:2] 1 esdhc1_clk_root eSDHCv2_1 > > For i.MX53: > 1–0 CG0 esdhc1_ipg_hclk: affects ipg_clk and hclk inputs of ESDEHC-1 (esdhc1_clk_enable) > 3–2 CG1 esdhc1_perclk: affects ipg_clk_perclk input of ESDEHC-1 (esdhc1_serial_clk_enable) > > Table 18-3 (Output clocks from CCM) in the iMX53RM shows that > ESDHCv2-1's ipg_clk_perclk is esdhc1_clk_root, so the clock structure > does seem to be the same here, between i.MX50 and i.MX53… That's correct. The esdhc clocks seem to differ. ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: sdhci-esdhc-imx/v5.0-rc5: i.MX50 system hangs when "per" clock is disabled 2019-02-07 22:52 sdhci-esdhc-imx/v5.0-rc5: i.MX50 system hangs when "per" clock is disabled Jonathan Neuschäfer 2019-02-08 0:50 ` Fabio Estevam @ 2019-02-10 21:32 ` Jonathan Neuschäfer 1 sibling, 0 replies; 5+ messages in thread From: Jonathan Neuschäfer @ 2019-02-10 21:32 UTC (permalink / raw) To: Jonathan Neuschäfer Cc: linux-clk, linux-mmc, linux-kernel, linux-arm-kernel, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Michael Turquette, Stephen Boyd, Adrian Hunter, Ulf Hansson [-- Attachment #1: Type: text/plain, Size: 803 bytes --] On Thu, Feb 07, 2019 at 11:52:11PM +0100, Jonathan Neuschäfer wrote: > However, as soon as the mmc driver (sdhci-esdhc-imx.c) disables clk_per > in sdhci_esdhc_runtime_suspend[2], the whole system locks up in some way. I've traced clk prepare/unprepare/enable/disable calls and got this right before it hangs: [ 1.280981] sdhci_esdhc_runtime_suspend: unprepare clk_per [ 1.283356] clk_core_unprepare esdhc1_per_gate [ 1.285191] clk_core_unprepare esdhc_a_podf [ 1.286881] clk_core_unprepare esdhc_a_pred [ 1.288568] clk_core_unprepare esdhc_a_sel [ 1.290220] clk_core_unprepare pll2_sw I suspect that there is a dependency on pll2_sw that is not represented in the imx5 clock driver. I'm comparing it to the Reference Manual now. Thanks, Jonathan Neuschäfer [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 833 bytes --] ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2019-02-10 21:32 UTC | newest] Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-02-07 22:52 sdhci-esdhc-imx/v5.0-rc5: i.MX50 system hangs when "per" clock is disabled Jonathan Neuschäfer 2019-02-08 0:50 ` Fabio Estevam 2019-02-09 16:24 ` Jonathan Neuschäfer 2019-02-09 17:15 ` Fabio Estevam 2019-02-10 21:32 ` Jonathan Neuschäfer
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