From: wangyan wang <wangyan.wang@mediatek.com>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, CK Hu <ck.hu@mediatek.com>
Cc: wangyan wang <wangyan.wang@mediatek.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
chunhui dai <chunhui.dai@mediatek.com>,
Colin Ian King <colin.king@canonical.com>,
Sean Wang <sean.wang@mediatek.com>,
Ryder Lee <ryder.lee@mediatek.com>, <linux-clk@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<dri-devel@lists.freedesktop.org>, <srv_heupstream@mediatek.com>
Subject: [PATCH V8 2/5] drm/mediatek: fix the rate and divder of hdmi phy for MT2701
Date: Tue, 2 Apr 2019 17:36:02 +0800 [thread overview]
Message-ID: <20190402093605.82004-3-wangyan.wang@mediatek.com> (raw)
In-Reply-To: <20190402093605.82004-1-wangyan.wang@mediatek.com>
From: Wangyan Wang <wangyan.wang@mediatek.com>
Due to a clerical error,there is one zero less for 12800000.
Fix it for 128000000
Fixes: 0fc721b2968e ("drm/mediatek: add hdmi driver for MT2701 and MT7623")
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Wangyan Wang <wangyan.wang@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
index 67a814649e19..844e622f052c 100644
--- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
+++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
@@ -116,8 +116,8 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,
if (rate <= 64000000)
pos_div = 3;
- else if (rate <= 12800000)
- pos_div = 1;
+ else if (rate <= 128000000)
+ pos_div = 2;
else
pos_div = 1;
--
2.14.1
next prev parent reply other threads:[~2019-04-02 9:36 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-02 9:36 [PATCH V8 0/5] make mt7623 clock of hdmi stable wangyan wang
2019-04-02 9:36 ` [PATCH V8 1/5] drm/mediatek: remove flag CLK_SET_RATE_PARENT for mt2701 hdmi phy to not propagate rate change to parent wangyan wang
2019-04-08 3:53 ` CK Hu
2019-04-02 9:36 ` wangyan wang [this message]
2019-04-02 9:36 ` [PATCH V8 3/5] drm/mediatek: using new factor for tvdpll in MT2701 wangyan wang
2019-04-08 3:54 ` CK Hu
2019-04-02 9:36 ` [PATCH V8 4/5] drm/mediatek: no change parent rate in round_rate() for mt2701 hdmi phy wangyan wang
2019-04-08 3:57 ` CK Hu
2019-04-02 9:36 ` [PATCH V8 5/5] drm/mediatek: make implementation of recalc_rate() to match the definition wangyan wang
2019-04-08 4:48 ` CK Hu
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