From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B6FF3C7618F for ; Mon, 15 Jul 2019 23:01:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 85AE620693 for ; Mon, 15 Jul 2019 23:01:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1563231691; bh=q70koxCb8PDCaI3s2+spmKTo5YiHS9NtUOqJ4N43dP4=; h=In-Reply-To:References:From:To:Cc:Subject:Date:List-ID:From; b=kcN1ACKtDWq9xa95rbs5JWi0/OJUdn/lBsG3d04CJqzxTPGmngUJ57JidCNGNga81 nOsOHeRXRvpCFzkxkkb10JU8NPUZqDwrKR9+hWnMHbhRlNKCRob6fGGu8cmmz59JpI UiF5wSMiHmCe0golfeG48QM/ELxCKqQJtUzp8/Ag= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731909AbfGOXBb (ORCPT ); Mon, 15 Jul 2019 19:01:31 -0400 Received: from mail.kernel.org ([198.145.29.99]:37618 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731798AbfGOXBb (ORCPT ); Mon, 15 Jul 2019 19:01:31 -0400 Received: from kernel.org (unknown [104.132.0.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id CBE4220693; Mon, 15 Jul 2019 23:01:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1563231689; bh=q70koxCb8PDCaI3s2+spmKTo5YiHS9NtUOqJ4N43dP4=; h=In-Reply-To:References:From:To:Cc:Subject:Date:From; b=TkZjVxneUR8EfJo6AiyCzRxqPUI+ecfv+f7LfG2OuifCo01enoiIU37vBbAdrSzYF hKfd9IYqbYZqskYqZmsRsdM18esx6BmUityfcoNcIK1/2Q5PXqGzmKVtimwyBcdOox o8D7Ns72ILarwsdfjHO6z6QtHUl9tRJPxJsLv9G0= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: <20190629135119.GF2911@vkoul-mobl> References: <20190625063140.17106-1-vkoul@kernel.org> <20190625063140.17106-4-vkoul@kernel.org> <20190627213151.B94FA20B7C@mail.kernel.org> <20190629135119.GF2911@vkoul-mobl> From: Stephen Boyd To: Vinod Koul Cc: linux-arm-msm@vger.kernel.org, Bjorn Andersson , Deepak Katragadda , Andy Gross , David Brown , Michael Turquette , linux-clk@vger.kernel.org, Taniya Das Subject: Re: [PATCH v3 3/3] clk: qcom: gcc: Add global clock controller driver for SM8150 User-Agent: alot/0.8.1 Date: Mon, 15 Jul 2019 16:01:29 -0700 Message-Id: <20190715230129.CBE4220693@mail.kernel.org> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Quoting Vinod Koul (2019-06-29 06:51:19) > On 27-06-19, 14:31, Stephen Boyd wrote: > > Quoting Vinod Koul (2019-06-24 23:31:40) > > > diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig > > > index 18bdf34d5e64..076872d195fd 100644 > > > --- a/drivers/clk/qcom/Kconfig > > > +++ b/drivers/clk/qcom/Kconfig > > > @@ -291,6 +291,13 @@ config SDM_LPASSCC_845 > > > Say Y if you want to use the LPASS branch clocks of the LPA= SS clock > > > controller to reset the LPASS subsystem. > > > =20 > > > +config SM_GCC_8150 > > > + tristate "SM8150 Global Clock Controller" > > > + help > > > + Support for the global clock controller on SM8150 devices. > > > + Say Y if you want to use peripheral devices such as UART, > > > + SPI, I2C, USB, SD/eMMC, PCIe etc. > >=20 > > Is there eMMC support? > >=20 I guess no? > > > diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile > > > index f0768fb1f037..4a813b4055d0 100644 > > > --- a/drivers/clk/qcom/Makefile > > > +++ b/drivers/clk/qcom/Makefile > > > @@ -50,6 +50,7 @@ obj-$(CONFIG_SDM_GCC_845) +=3D gcc-sdm845.o > > > obj-$(CONFIG_SDM_GPUCC_845) +=3D gpucc-sdm845.o > > > obj-$(CONFIG_SDM_LPASSCC_845) +=3D lpasscc-sdm845.o > > > obj-$(CONFIG_SDM_VIDEOCC_845) +=3D videocc-sdm845.o > > > +obj-$(CONFIG_SM_GCC_8150) +=3D gcc-sm8150.o > > > obj-$(CONFIG_SPMI_PMIC_CLKDIV) +=3D clk-spmi-pmic-div.o > > > obj-$(CONFIG_KPSS_XCC) +=3D kpss-xcc.o > > > obj-$(CONFIG_QCOM_HFPLL) +=3D hfpll.o > > > diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8= 150.c > > > new file mode 100644 > > > index 000000000000..11cd9e19f18d > > > --- /dev/null > > > +++ b/drivers/clk/qcom/gcc-sm8150.c > > > +static const struct clk_parent_data gcc_parents_5[] =3D { > > > + { .fw_name =3D "bi_tcxo", .name =3D "bi_tcxo" }, > > > + { .fw_name =3D "gpll0", .name =3D "gpll0" }, > > > + { .fw_name =3D "gpll7", .name =3D "gpll7" }, > > > + { .fw_name =3D "gpll0_out_even", .name =3D "gpll0_out_even" }, > >=20 > > Aren't these gplls all created in this file? They shouldn't be listed in > > DT so I'm confused why we have .fw_name for them. >=20 > Yes they are and the DT doesnt provide these clock. From what I > understood from the name conversion to new schema was we should add it > like above, let me know if I missed something >=20 Yes, you should use the direct clk_hw pointer part of the clk_parent_data structure instead of having a .fw_name or .name member in these rows. Any clk inside of the clk controller shouldn't be exposed into DT just so that we can find it again through string comparisons.