From: Icenowy Zheng <icenowy@aosc.io>
To: Rob Herring <robh+dt@kernel.org>,
Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Linus Walleij <linus.walleij@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-sunxi@googlegroups.com,
Icenowy Zheng <icenowy@aosc.io>
Subject: [PATCH v5 4/6] ARM: sunxi: dts: s3/s3l/v3: add DTSI files for S3/S3L/V3 SoCs
Date: Sun, 28 Jul 2019 11:12:25 +0800 [thread overview]
Message-ID: <20190728031227.49140-5-icenowy@aosc.io> (raw)
In-Reply-To: <20190728031227.49140-1-icenowy@aosc.io>
The Allwinner S3/S3L/V3 SoCs all share the same die with the V3s SoC,
but with more GPIO wired out of the package.
Add a DTSI file for these SoCs. It just replaces some compatible strings
of the V3s DTSI now. As these SoCs share the same feature set on Linux,
we use the first known chip (V3) as the file's name.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
Changes in v5:
- Dropped dedicated S3/S3L DTSIs.
No changes until v5.
arch/arm/boot/dts/sun8i-v3.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
create mode 100644 arch/arm/boot/dts/sun8i-v3.dtsi
diff --git a/arch/arm/boot/dts/sun8i-v3.dtsi b/arch/arm/boot/dts/sun8i-v3.dtsi
new file mode 100644
index 000000000000..6ae8645ade50
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-v3.dtsi
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io>
+ */
+
+#include "sun8i-v3s.dtsi"
+
+&ccu {
+ compatible = "allwinner,sun8i-v3-ccu";
+};
+
+&pio {
+ compatible = "allwinner,sun8i-v3-pinctrl";
+};
--
2.21.0
next prev parent reply other threads:[~2019-07-28 3:14 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-28 3:12 [PATCH v5 0/6] Support for Allwinner V3/S3L and Sochip S3 Icenowy Zheng
2019-07-28 3:12 ` [PATCH v5 1/6] pinctrl: sunxi: v3s: introduce support for V3 Icenowy Zheng
2019-08-05 10:36 ` Linus Walleij
2019-07-28 3:12 ` [PATCH v5 2/6] clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocks Icenowy Zheng
2019-07-28 3:12 ` [PATCH v5 3/6] clk: sunxi-ng: v3s: add Allwinner V3 support Icenowy Zheng
2019-07-28 3:12 ` Icenowy Zheng [this message]
2019-07-28 3:12 ` [PATCH v5 5/6] dt-bindings: arm: sunxi: add binding for Lichee Zero Plus core board Icenowy Zheng
2019-07-28 3:12 ` [PATCH v5 6/6] ARM: dts: sun8i: s3: add devicetree for Lichee zero plus w/ S3 Icenowy Zheng
2019-08-12 8:07 ` [PATCH v5 0/6] Support for Allwinner V3/S3L and Sochip S3 Maxime Ripard
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190728031227.49140-5-icenowy@aosc.io \
--to=icenowy@aosc.io \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-sunxi@googlegroups.com \
--cc=mripard@kernel.org \
--cc=robh+dt@kernel.org \
--cc=wens@csie.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).