From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B369C32756 for ; Fri, 9 Aug 2019 09:34:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E88A921880 for ; Fri, 9 Aug 2019 09:34:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2406298AbfHIJdS (ORCPT ); Fri, 9 Aug 2019 05:33:18 -0400 Received: from shell.v3.sk ([90.176.6.54]:51945 "EHLO shell.v3.sk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2406294AbfHIJdR (ORCPT ); Fri, 9 Aug 2019 05:33:17 -0400 Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 5DFB4D63CB; Fri, 9 Aug 2019 11:33:13 +0200 (CEST) Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id vJ9V4MtugYfV; Fri, 9 Aug 2019 11:32:40 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 5991FD63D2; Fri, 9 Aug 2019 11:32:25 +0200 (CEST) X-Virus-Scanned: amavisd-new at zimbra.v3.sk Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id D0045EFrnD-y; Fri, 9 Aug 2019 11:32:18 +0200 (CEST) Received: from furthur.local (ip-37-188-137-236.eurotel.cz [37.188.137.236]) by zimbra.v3.sk (Postfix) with ESMTPSA id 416E9D63C1; Fri, 9 Aug 2019 11:32:16 +0200 (CEST) From: Lubomir Rintel To: Olof Johansson Cc: Rob Herring , Mark Rutland , Thomas Gleixner , Jason Cooper , Marc Zyngier , Kishon Vijay Abraham I , Russell King , Michael Turquette , Stephen Boyd , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, Lubomir Rintel Subject: [PATCH 09/19] ARM: l2c: add definition for FWA in PL310 aux register Date: Fri, 9 Aug 2019 11:31:48 +0200 Message-Id: <20190809093158.7969-10-lkundrak@v3.sk> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190809093158.7969-1-lkundrak@v3.sk> References: <20190809093158.7969-1-lkundrak@v3.sk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The PL310 also has a "Force write allocate" bits in the Auxiliary Control Register. Signed-off-by: Lubomir Rintel --- arch/arm/include/asm/hardware/cache-l2x0.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/includ= e/asm/hardware/cache-l2x0.h index 32edfadb15935..a6d4ee86ba543 100644 --- a/arch/arm/include/asm/hardware/cache-l2x0.h +++ b/arch/arm/include/asm/hardware/cache-l2x0.h @@ -118,6 +118,8 @@ #define L310_AUX_CTRL_STORE_LIMITATION BIT(11) /* R2P0+ */ #define L310_AUX_CTRL_EXCLUSIVE_CACHE BIT(12) #define L310_AUX_CTRL_ASSOCIATIVITY_16 BIT(16) +#define L310_AUX_CTRL_FWA_SHIFT 23 +#define L310_AUX_CTRL_FWA_MASK (3 << 23) #define L310_AUX_CTRL_CACHE_REPLACE_RR BIT(25) /* R2P0+ */ #define L310_AUX_CTRL_NS_LOCKDOWN BIT(26) #define L310_AUX_CTRL_NS_INT_CTRL BIT(27) --=20 2.21.0