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From: Geert Uytterhoeven <geert+renesas@glider.be>
To: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>
Cc: linux-clk@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
	Geert Uytterhoeven <geert+renesas@glider.be>
Subject: [PATCH v2 7/8] clk: renesas: rcar-gen3: Switch Z clocks to .determine_rate()
Date: Fri, 30 Aug 2019 15:45:14 +0200
Message-ID: <20190830134515.11925-8-geert+renesas@glider.be> (raw)
In-Reply-To: <20190830134515.11925-1-geert+renesas@glider.be>

As the .round_rate() callback returns a long clock rate, it cannot
return clock rates that do not fit in signed long, but do fit in
unsigned long.  Hence switch the Z clocks on R-Car Gen3 from the old
.round_rate() callback to the newer .determine_rate() callback, which
does not suffer from this limitation.

This includes implementing range checking.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2:
  - Use div_u64() for division by unsigned long,
  - Rebased.
---
 drivers/clk/renesas/rcar-gen3-cpg.c | 22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c b/drivers/clk/renesas/rcar-gen3-cpg.c
index a612045cba7d97b7..176f908929b3920f 100644
--- a/drivers/clk/renesas/rcar-gen3-cpg.c
+++ b/drivers/clk/renesas/rcar-gen3-cpg.c
@@ -114,18 +114,24 @@ static unsigned long cpg_z_clk_recalc_rate(struct clk_hw *hw,
 				     32 * zclk->fixed_div);
 }
 
-static long cpg_z_clk_round_rate(struct clk_hw *hw, unsigned long rate,
-				 unsigned long *parent_rate)
+static int cpg_z_clk_determine_rate(struct clk_hw *hw,
+				    struct clk_rate_request *req)
 {
 	struct cpg_z_clk *zclk = to_z_clk(hw);
+	unsigned int min_mult, max_mult, mult;
 	unsigned long prate;
-	unsigned int mult;
 
-	prate = *parent_rate / zclk->fixed_div;
-	mult = div64_ul(rate * 32ULL, prate);
-	mult = clamp(mult, 1U, 32U);
+	prate = req->best_parent_rate / zclk->fixed_div;
+	min_mult = max(div64_ul(req->min_rate * 32ULL, prate), 1ULL);
+	max_mult = min(div64_ul(req->max_rate * 32ULL, prate), 32ULL);
+	if (max_mult < min_mult)
+		return -EINVAL;
 
-	return div_u64((u64)prate * mult, 32);
+	mult = div64_ul(req->rate * 32ULL, prate);
+	mult = clamp(mult, min_mult, max_mult);
+
+	req->rate = div_u64((u64)prate * mult, 32);
+	return 0;
 }
 
 static int cpg_z_clk_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -172,7 +178,7 @@ static int cpg_z_clk_set_rate(struct clk_hw *hw, unsigned long rate,
 
 static const struct clk_ops cpg_z_clk_ops = {
 	.recalc_rate = cpg_z_clk_recalc_rate,
-	.round_rate = cpg_z_clk_round_rate,
+	.determine_rate = cpg_z_clk_determine_rate,
 	.set_rate = cpg_z_clk_set_rate,
 };
 
-- 
2.17.1


  parent reply index

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-30 13:45 [PATCH v2 0/8] clk: renesas: rcar-gen2/gen3: Switch " Geert Uytterhoeven
2019-08-30 13:45 ` [PATCH v2 1/8] clk: renesas: rcar-gen2: Improve arithmetic divisions Geert Uytterhoeven
2019-08-30 21:42   ` Niklas Söderlund
2019-08-30 13:45 ` [PATCH v2 2/8] clk: renesas: rcar-gen3: " Geert Uytterhoeven
2019-08-30 21:57   ` Niklas Söderlund
2019-08-30 13:45 ` [PATCH v2 3/8] clk: renesas: rcar-gen3: Avoid double table iteration in SD .set_rate() Geert Uytterhoeven
2019-08-30 22:06   ` Niklas Söderlund
2019-08-30 13:45 ` [PATCH v2 4/8] clk: renesas: rcar-gen3: Absorb cpg_sd_clock_calc_div() Geert Uytterhoeven
2019-08-30 22:14   ` Niklas Söderlund
2019-08-30 13:45 ` [PATCH v2 5/8] clk: renesas: rcar-gen3: Loop to find best rate in cpg_sd_clock_round_rate() Geert Uytterhoeven
2019-08-30 22:23   ` Niklas Söderlund
2019-08-30 13:45 ` [PATCH v2 6/8] clk: renesas: rcar-gen2: Switch Z clock to .determine_rate() Geert Uytterhoeven
2019-08-30 13:45 ` Geert Uytterhoeven [this message]
2019-08-30 13:45 ` [PATCH v2 8/8] clk: renesas: rcar-gen3: Switch SD clocks " Geert Uytterhoeven
2019-09-03 22:09 ` [PATCH v2 0/8] clk: renesas: rcar-gen2/gen3: Switch " Stephen Boyd
2019-09-04  6:51   ` Geert Uytterhoeven
2019-09-11 16:24     ` Stephen Boyd
2019-10-21  8:35       ` Geert Uytterhoeven

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