[PATCHv3 00/10] clk: ti: remoteproc / iommu support patches

[PATCHv3 00/10] clk: ti: remoteproc / iommu support patches

[Tero Kristo]

Hi,

V3 of this series sort of reverted back to pretty much V1 which expects
strict sequencing of events from the bus driver. This one doesn't have
any dependency towards the reset driver either, and the controversial
reset handling APIs have been removed.

-Tero


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[PATCHv3 01/10] clk: ti: clkctrl: fix setting up clkctrl clocks

[Tero Kristo]

Apply the proper register function for clkctrl clocks, so they get
registered under the clk_hw_omap list also. This allows checking their
type runtime.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 drivers/clk/ti/clkctrl.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/ti/clkctrl.c b/drivers/clk/ti/clkctrl.c
index 975995eea15c..a914df2e9e1b 100644
--- a/drivers/clk/ti/clkctrl.c
+++ b/drivers/clk/ti/clkctrl.c
@@ -622,7 +622,7 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node)
 		init.ops = &omap4_clkctrl_clk_ops;
 		hw->hw.init = &init;
 
-		clk = ti_clk_register(NULL, &hw->hw, init.name);
+		clk = ti_clk_register_omap_hw(NULL, &hw->hw, init.name);
 		if (IS_ERR_OR_NULL(clk))
 			goto cleanup;
 
-- 
2.17.1

--
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[PATCHv3 02/10] clk: ti: clkctrl: convert to use bit helper macros instead of bitops

[Tero Kristo]

This improves the readibility of the code slightly, and makes modifying
the flags bit simpler.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 drivers/clk/ti/clkctrl.c | 8 ++++----
 include/linux/clk/ti.h   | 2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/ti/clkctrl.c b/drivers/clk/ti/clkctrl.c
index a914df2e9e1b..d904a9a7626a 100644
--- a/drivers/clk/ti/clkctrl.c
+++ b/drivers/clk/ti/clkctrl.c
@@ -24,7 +24,7 @@
 #include <linux/timekeeping.h>
 #include "clock.h"
 
-#define NO_IDLEST			0x1
+#define NO_IDLEST			0
 
 #define OMAP4_MODULEMODE_MASK		0x3
 
@@ -158,7 +158,7 @@ static int _omap4_clkctrl_clk_enable(struct clk_hw *hw)
 
 	ti_clk_ll_ops->clk_writel(val, &clk->enable_reg);
 
-	if (clk->flags & NO_IDLEST)
+	if (test_bit(NO_IDLEST, &clk->flags))
 		return 0;
 
 	/* Wait until module is enabled */
@@ -187,7 +187,7 @@ static void _omap4_clkctrl_clk_disable(struct clk_hw *hw)
 
 	ti_clk_ll_ops->clk_writel(val, &clk->enable_reg);
 
-	if (clk->flags & NO_IDLEST)
+	if (test_bit(NO_IDLEST, &clk->flags))
 		goto exit;
 
 	/* Wait until module is disabled */
@@ -596,7 +596,7 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node)
 		if (reg_data->flags & CLKF_HW_SUP)
 			hw->enable_bit = MODULEMODE_HWCTRL;
 		if (reg_data->flags & CLKF_NO_IDLEST)
-			hw->flags |= NO_IDLEST;
+			set_bit(NO_IDLEST, &hw->flags);
 
 		if (reg_data->clkdm_name)
 			hw->clkdm_name = reg_data->clkdm_name;
diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
index 1e8ef96555ce..bb2c5af9082a 100644
--- a/include/linux/clk/ti.h
+++ b/include/linux/clk/ti.h
@@ -153,7 +153,7 @@ struct clk_hw_omap {
 	u8			fixed_div;
 	struct clk_omap_reg	enable_reg;
 	u8			enable_bit;
-	u8			flags;
+	unsigned long		flags;
 	struct clk_omap_reg	clksel_reg;
 	struct dpll_data	*dpll_data;
 	const char		*clkdm_name;
-- 
2.17.1

--
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[PATCHv3 03/10] clk: ti: clkctrl: add new exported API for checking standby info

[Tero Kristo]

Standby status is provided for certain clkctrl clocks to see if the
given module has entered standby or not. This is mostly needed by
remoteproc code to see if the remoteproc has entered standby and the clock
can be turned off safely.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 drivers/clk/ti/clkctrl.c | 33 +++++++++++++++++++++++++++++++++
 include/linux/clk/ti.h   |  1 +
 2 files changed, 34 insertions(+)

diff --git a/drivers/clk/ti/clkctrl.c b/drivers/clk/ti/clkctrl.c
index d904a9a7626a..e3e0a66a6ce2 100644
--- a/drivers/clk/ti/clkctrl.c
+++ b/drivers/clk/ti/clkctrl.c
@@ -34,6 +34,9 @@
 #define OMAP4_IDLEST_MASK		(0x3 << 16)
 #define OMAP4_IDLEST_SHIFT		16
 
+#define OMAP4_STBYST_MASK		BIT(18)
+#define OMAP4_STBYST_SHIFT		18
+
 #define CLKCTRL_IDLEST_FUNCTIONAL	0x0
 #define CLKCTRL_IDLEST_INTERFACE_IDLE	0x2
 #define CLKCTRL_IDLEST_DISABLED		0x3
@@ -647,3 +650,33 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node)
 }
 CLK_OF_DECLARE(ti_omap4_clkctrl_clock, "ti,clkctrl",
 	       _ti_omap4_clkctrl_setup);
+
+/**
+ * ti_clk_is_in_standby - Check if clkctrl clock is in standby or not
+ * @clk: clock to check standby status for
+ *
+ * Finds whether the provided clock is in standby mode or not. Returns
+ * true if the provided clock is a clkctrl type clock and it is in standby,
+ * false otherwise.
+ */
+u32 ti_clk_is_in_standby(struct clk *clk)
+{
+	struct clk_hw *hw;
+	struct clk_hw_omap *hwclk;
+	u32 val;
+
+	hw = __clk_get_hw(clk);
+
+	if (!omap2_clk_is_hw_omap(hw))
+		return false;
+
+	hwclk = to_clk_hw_omap(hw);
+
+	val = ti_clk_ll_ops->clk_readl(&hwclk->enable_reg);
+
+	if (val & OMAP4_STBYST_MASK)
+		return true;
+
+	return false;
+}
+EXPORT_SYMBOL_GPL(ti_clk_is_in_standby);
diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
index bb2c5af9082a..3fb777f7103a 100644
--- a/include/linux/clk/ti.h
+++ b/include/linux/clk/ti.h
@@ -298,6 +298,7 @@ struct ti_clk_features {
 
 void ti_clk_setup_features(struct ti_clk_features *features);
 const struct ti_clk_features *ti_clk_get_features(void);
+u32 ti_clk_is_in_standby(struct clk *clk);
 int omap3_noncore_dpll_save_context(struct clk_hw *hw);
 void omap3_noncore_dpll_restore_context(struct clk_hw *hw);
 
-- 
2.17.1

--
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[PATCHv3 04/10] dt-bindings: clk: add omap5 iva clkctrl definitions

[Tero Kristo]

OMAP5 device contains an IVA subsystem (Image and Video Accelerator.)
IVA subsystem clkctrl definitions are currently missing, so add them.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 include/dt-bindings/clock/omap5.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/dt-bindings/clock/omap5.h b/include/dt-bindings/clock/omap5.h
index f3283957f48d..eb6d2fbe78f9 100644
--- a/include/dt-bindings/clock/omap5.h
+++ b/include/dt-bindings/clock/omap5.h
@@ -86,6 +86,10 @@
 #define OMAP5_UART5_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x170)
 #define OMAP5_UART6_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x178)
 
+/* iva clocks */
+#define OMAP5_IVA_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x20)
+#define OMAP5_SL2IF_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x28)
+
 /* dss clocks */
 #define OMAP5_DSS_CORE_CLKCTRL	OMAP5_CLKCTRL_INDEX(0x20)
 
-- 
2.17.1

--
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[PATCHv3 05/10] clk: ti: omap5: add IVA subsystem clkctrl data

[Tero Kristo]

Add clkctrl data for the IVA subsystem (Image and Video Accelerator.)

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 drivers/clk/ti/clk-54xx.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c
index dafef7e70ba8..f63871dac600 100644
--- a/drivers/clk/ti/clk-54xx.c
+++ b/drivers/clk/ti/clk-54xx.c
@@ -286,6 +286,12 @@ static const struct omap_clkctrl_reg_data omap5_l4per_clkctrl_regs[] __initconst
 	{ 0 },
 };
 
+static const struct omap_clkctrl_reg_data omap5_iva_clkctrl_regs[] __initconst = {
+	{ OMAP5_IVA_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_iva_h12x2_ck" },
+	{ OMAP5_SL2IF_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_iva_h12x2_ck" },
+	{ 0 },
+};
+
 static const char * const omap5_dss_dss_clk_parents[] __initconst = {
 	"dpll_per_h12x2_ck",
 	NULL,
@@ -469,6 +475,7 @@ const struct omap_clkctrl_data omap5_clkctrl_data[] __initconst = {
 	{ 0x4a008d20, omap5_l4cfg_clkctrl_regs },
 	{ 0x4a008e20, omap5_l3instr_clkctrl_regs },
 	{ 0x4a009020, omap5_l4per_clkctrl_regs },
+	{ 0x4a009220, omap5_iva_clkctrl_regs },
 	{ 0x4a009420, omap5_dss_clkctrl_regs },
 	{ 0x4a009620, omap5_l3init_clkctrl_regs },
 	{ 0x4ae07920, omap5_wkupaon_clkctrl_regs },
-- 
2.17.1

--
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[PATCHv3 06/10] clk: ti: dra7xx: Drop idlest polling from IPU & DSP clkctrl clocks

[Tero Kristo]

The IPU and DSP remote processor cores and their corresponding MMUs on
DRA7 SoCs have hardreset lines associated with them and are controlled
by a PRCM reset line each. Any clkctrl enable/disable operations cannot
be checked for module enabled/disabled status independent of the reset
operation, and this causes some unwanted timeouts in the kernel and
unbalanced states for these clocks. These details should be handled by
the driver integration code itself.

Add the CLKF_NO_IDLEST flag to both the IPU and DSP clkctrl clocks so
that these module status checks are skipped.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 drivers/clk/ti/clk-7xx.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c
index b57fe09b428b..94e69cdc2bd2 100644
--- a/drivers/clk/ti/clk-7xx.c
+++ b/drivers/clk/ti/clk-7xx.c
@@ -25,7 +25,7 @@ static const struct omap_clkctrl_reg_data dra7_mpu_clkctrl_regs[] __initconst =
 };
 
 static const struct omap_clkctrl_reg_data dra7_dsp1_clkctrl_regs[] __initconst = {
-	{ DRA7_DSP1_MMU0_DSP1_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_dsp_m2_ck" },
+	{ DRA7_DSP1_MMU0_DSP1_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLEST, "dpll_dsp_m2_ck" },
 	{ 0 },
 };
 
@@ -41,7 +41,7 @@ static const struct omap_clkctrl_bit_data dra7_mmu_ipu1_bit_data[] __initconst =
 };
 
 static const struct omap_clkctrl_reg_data dra7_ipu1_clkctrl_regs[] __initconst = {
-	{ DRA7_IPU1_MMU_IPU1_CLKCTRL, dra7_mmu_ipu1_bit_data, CLKF_HW_SUP, "ipu1-clkctrl:0000:24" },
+	{ DRA7_IPU1_MMU_IPU1_CLKCTRL, dra7_mmu_ipu1_bit_data, CLKF_HW_SUP | CLKF_NO_IDLEST, "ipu1-clkctrl:0000:24" },
 	{ 0 },
 };
 
@@ -137,7 +137,7 @@ static const struct omap_clkctrl_reg_data dra7_ipu_clkctrl_regs[] __initconst =
 };
 
 static const struct omap_clkctrl_reg_data dra7_dsp2_clkctrl_regs[] __initconst = {
-	{ DRA7_DSP2_MMU0_DSP2_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_dsp_m2_ck" },
+	{ DRA7_DSP2_MMU0_DSP2_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLEST, "dpll_dsp_m2_ck" },
 	{ 0 },
 };
 
@@ -164,7 +164,7 @@ static const struct omap_clkctrl_reg_data dra7_l3main1_clkctrl_regs[] __initcons
 };
 
 static const struct omap_clkctrl_reg_data dra7_ipu2_clkctrl_regs[] __initconst = {
-	{ DRA7_IPU2_MMU_IPU2_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_core_h22x2_ck" },
+	{ DRA7_IPU2_MMU_IPU2_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLEST, "dpll_core_h22x2_ck" },
 	{ 0 },
 };
 
-- 
2.17.1

--
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[PATCHv3 07/10] clk: ti: omap4: Drop idlest polling from IPU & DSP clkctrl clocks

[Tero Kristo]

From: Suman Anna <s-anna@ti.com>

The IPU and DSP remote processor cores and their corresponding MMUs on
OMAP4 SoCs have hardreset lines associated with them and are controlled
by a PRCM reset line each. Any clkctrl enable/disable operations cannot
be checked for module enabled/disabled status independent of the reset
operation, and this causes some unwanted timeouts in the kernel and
unbalanced states for these clocks. These details should be handled by
the driver integration code itself.

Add the CLKF_NO_IDLEST flag to both the IPU and DSP clkctrl clocks so
that these module status checks are skipped.

Signed-off-by: Suman Anna <s-anna@ti.com>
---
 drivers/clk/ti/clk-44xx.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/ti/clk-44xx.c b/drivers/clk/ti/clk-44xx.c
index b10ed0429091..2b4dab632318 100644
--- a/drivers/clk/ti/clk-44xx.c
+++ b/drivers/clk/ti/clk-44xx.c
@@ -37,7 +37,7 @@ static const struct omap_clkctrl_reg_data omap4_mpuss_clkctrl_regs[] __initconst
 };
 
 static const struct omap_clkctrl_reg_data omap4_tesla_clkctrl_regs[] __initconst = {
-	{ OMAP4_DSP_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_iva_m4x2_ck" },
+	{ OMAP4_DSP_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLEST, "dpll_iva_m4x2_ck" },
 	{ 0 },
 };
 
@@ -219,7 +219,7 @@ static const struct omap_clkctrl_reg_data omap4_l3_2_clkctrl_regs[] __initconst
 };
 
 static const struct omap_clkctrl_reg_data omap4_ducati_clkctrl_regs[] __initconst = {
-	{ OMAP4_IPU_CLKCTRL, NULL, CLKF_HW_SUP, "ducati_clk_mux_ck" },
+	{ OMAP4_IPU_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLEST, "ducati_clk_mux_ck" },
 	{ 0 },
 };
 
-- 
2.17.1

--
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[PATCHv3 08/10] clk: ti: omap5: Drop idlest polling from IPU & DSP clkctrl clocks

[Tero Kristo]

From: Suman Anna <s-anna@ti.com>

The IPU and DSP remote processor cores and their corresponding MMUs on
OMAP5 SoCs have hardreset lines associated with them and are controlled
by a PRCM reset line each. Any clkctrl enable/disable operations cannot
be checked for module enabled/disabled status independent of the reset
operation, and this causes some unwanted timeouts in the kernel and
unbalanced states for these clocks. These details should be handled by
the driver integration code itself.

Add the CLKF_NO_IDLEST flag to both the IPU and DSP clkctrl clocks so
that these module status checks are skipped.

Signed-off-by: Suman Anna <s-anna@ti.com>
---
 drivers/clk/ti/clk-54xx.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c
index f63871dac600..b5e5658f614f 100644
--- a/drivers/clk/ti/clk-54xx.c
+++ b/drivers/clk/ti/clk-54xx.c
@@ -31,7 +31,7 @@ static const struct omap_clkctrl_reg_data omap5_mpu_clkctrl_regs[] __initconst =
 };
 
 static const struct omap_clkctrl_reg_data omap5_dsp_clkctrl_regs[] __initconst = {
-	{ OMAP5_MMU_DSP_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_iva_h11x2_ck" },
+	{ OMAP5_MMU_DSP_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLEST, "dpll_iva_h11x2_ck" },
 	{ 0 },
 };
 
@@ -145,7 +145,7 @@ static const struct omap_clkctrl_reg_data omap5_l3main2_clkctrl_regs[] __initcon
 };
 
 static const struct omap_clkctrl_reg_data omap5_ipu_clkctrl_regs[] __initconst = {
-	{ OMAP5_MMU_IPU_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_core_h22x2_ck" },
+	{ OMAP5_MMU_IPU_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLEST, "dpll_core_h22x2_ck" },
 	{ 0 },
 };
 
-- 
2.17.1

--
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[PATCHv3 09/10] clk: ti: am43xx: drop idlest polling from pruss clkctrl clock

[Tero Kristo]

The PRUSS modules on AM43xx SoCs have a hardreset line and are controlled
by a PRCM reset line. Any clkctrl enable/disable operations cannot be
checked for module enabled/disabled status independent of the reset
operation, and this causes some unwanted timeouts in the kernel and
unbalanced states for the PRUSS clocks. These details should be handled
by the driver integration code itself.

Add the CLKF_NO_IDLEST flag to the PRUSS clkctrl clock so that these
module status checks are skipped.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 drivers/clk/ti/clk-43xx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/ti/clk-43xx.c b/drivers/clk/ti/clk-43xx.c
index 2782d91838ac..7ec8fe6aa7c1 100644
--- a/drivers/clk/ti/clk-43xx.c
+++ b/drivers/clk/ti/clk-43xx.c
@@ -126,7 +126,7 @@ static const struct omap_clkctrl_reg_data am4_l3s_clkctrl_regs[] __initconst = {
 };
 
 static const struct omap_clkctrl_reg_data am4_pruss_ocp_clkctrl_regs[] __initconst = {
-	{ AM4_PRUSS_OCP_PRUSS_CLKCTRL, NULL, CLKF_SW_SUP, "pruss_ocp_gclk" },
+	{ AM4_PRUSS_OCP_PRUSS_CLKCTRL, NULL, CLKF_SW_SUP | CLKF_NO_IDLEST, "pruss_ocp_gclk" },
 	{ 0 },
 };
 
-- 
2.17.1

--
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[PATCHv3 10/10] clk: ti: am33xx: drop idlest polling from pruss clkctrl clock

[Tero Kristo]

The PRUSS module on AM33xx SoCs has a hardreset line and is controlled
by a PRCM reset line. Any clkctrl enable/disable operations cannot be
checked for module enabled/disabled status independent of the reset
operation, and this causes some unwanted timeouts in the kernel and
unbalanced states for the PRUSS clocks. These details should be handled
by the driver integration code itself.

Add the CLKF_NO_IDLEST flag to the PRUSS clkctrl clock so that these
module status checks are skipped.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 drivers/clk/ti/clk-33xx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/ti/clk-33xx.c b/drivers/clk/ti/clk-33xx.c
index a360d3109555..935efb66b389 100644
--- a/drivers/clk/ti/clk-33xx.c
+++ b/drivers/clk/ti/clk-33xx.c
@@ -107,7 +107,7 @@ static const struct omap_clkctrl_reg_data am3_l4hs_clkctrl_regs[] __initconst =
 };
 
 static const struct omap_clkctrl_reg_data am3_pruss_ocp_clkctrl_regs[] __initconst = {
-	{ AM3_PRUSS_OCP_PRUSS_CLKCTRL, NULL, CLKF_SW_SUP, "pruss_ocp_gclk" },
+	{ AM3_PRUSS_OCP_PRUSS_CLKCTRL, NULL, CLKF_SW_SUP | CLKF_NO_IDLEST, "pruss_ocp_gclk" },
 	{ 0 },
 };
 
-- 
2.17.1

--
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Re: [PATCHv3 00/10] clk: ti: remoteproc / iommu support patches

[Tero Kristo]

On 12/09/2019 16:26, Tero Kristo wrote:
> Hi,
> 
> V3 of this series sort of reverted back to pretty much V1 which expects
> strict sequencing of events from the bus driver. This one doesn't have
> any dependency towards the reset driver either, and the controversial
> reset handling APIs have been removed.
> 
> -Tero

Stephen, any comments on this one or shall I just craft a pull-request 
for this and rest of the TI clock driver changes towards 5.5? There 
seems to be a pile of them coming this time over...

-Tero

--
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Re: [PATCHv3 00/10] clk: ti: remoteproc / iommu support patches

[Tony Lindgren]

* Tero Kristo <t-kristo@ti.com> [191010 08:34]:
> On 12/09/2019 16:26, Tero Kristo wrote:
> > Hi,
> > 
> > V3 of this series sort of reverted back to pretty much V1 which expects
> > strict sequencing of events from the bus driver. This one doesn't have
> > any dependency towards the reset driver either, and the controversial
> > reset handling APIs have been removed.
> > 
> > -Tero
> 
> Stephen, any comments on this one or shall I just craft a pull-request for
> this and rest of the TI clock driver changes towards 5.5? There seems to be
> a pile of them coming this time over...

Sounds like we need an immutable branch for the clkctrl related
changes against v5.4-rc1 that I can also merge into omap-for-v5.5/prm
branch in addition to the immutable prm reset driver branch.

Otherwise I can't apply any of the consumer device related dts
changes into that branch AFAIK.

Regards,

Tony

Re: [PATCHv3 00/10] clk: ti: remoteproc / iommu support patches

[Tero Kristo]

On 10/10/2019 17:35, Tony Lindgren wrote:
> * Tero Kristo <t-kristo@ti.com> [191010 08:34]:
>> On 12/09/2019 16:26, Tero Kristo wrote:
>>> Hi,
>>>
>>> V3 of this series sort of reverted back to pretty much V1 which expects
>>> strict sequencing of events from the bus driver. This one doesn't have
>>> any dependency towards the reset driver either, and the controversial
>>> reset handling APIs have been removed.
>>>
>>> -Tero
>>
>> Stephen, any comments on this one or shall I just craft a pull-request for
>> this and rest of the TI clock driver changes towards 5.5? There seems to be
>> a pile of them coming this time over...
> 
> Sounds like we need an immutable branch for the clkctrl related
> changes against v5.4-rc1 that I can also merge into omap-for-v5.5/prm
> branch in addition to the immutable prm reset driver branch.
> 
> Otherwise I can't apply any of the consumer device related dts
> changes into that branch AFAIK.

Well, the sgx patch you can probably merge, as it will fail silently and 
only cause issues if you actually try to enable the device.

However, yes I agree, we should probably setup an immutable branch here.

-Tero
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Re: [PATCHv3 00/10] clk: ti: remoteproc / iommu support patches

[Tero Kristo]

On 10/10/2019 18:32, Tero Kristo wrote:
> On 10/10/2019 17:35, Tony Lindgren wrote:
>> * Tero Kristo <t-kristo@ti.com> [191010 08:34]:
>>> On 12/09/2019 16:26, Tero Kristo wrote:
>>>> Hi,
>>>>
>>>> V3 of this series sort of reverted back to pretty much V1 which expects
>>>> strict sequencing of events from the bus driver. This one doesn't have
>>>> any dependency towards the reset driver either, and the controversial
>>>> reset handling APIs have been removed.
>>>>
>>>> -Tero
>>>
>>> Stephen, any comments on this one or shall I just craft a 
>>> pull-request for
>>> this and rest of the TI clock driver changes towards 5.5? There seems 
>>> to be
>>> a pile of them coming this time over...
>>
>> Sounds like we need an immutable branch for the clkctrl related
>> changes against v5.4-rc1 that I can also merge into omap-for-v5.5/prm
>> branch in addition to the immutable prm reset driver branch.
>>
>> Otherwise I can't apply any of the consumer device related dts
>> changes into that branch AFAIK.
> 
> Well, the sgx patch you can probably merge, as it will fail silently and 
> only cause issues if you actually try to enable the device.
> 
> However, yes I agree, we should probably setup an immutable branch here.

Queued this series towards 5.5, thanks.

-Tero
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Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

Re: [PATCHv3 03/10] clk: ti: clkctrl: add new exported API for checking standby info

[Stephen Boyd]

Quoting Tero Kristo (2019-09-12 06:26:06)
> diff --git a/drivers/clk/ti/clkctrl.c b/drivers/clk/ti/clkctrl.c
> index d904a9a7626a..e3e0a66a6ce2 100644
> --- a/drivers/clk/ti/clkctrl.c
> +++ b/drivers/clk/ti/clkctrl.c
> @@ -647,3 +650,33 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node)
>  }
>  CLK_OF_DECLARE(ti_omap4_clkctrl_clock, "ti,clkctrl",
>                _ti_omap4_clkctrl_setup);
> +
> +/**
> + * ti_clk_is_in_standby - Check if clkctrl clock is in standby or not
> + * @clk: clock to check standby status for
> + *
> + * Finds whether the provided clock is in standby mode or not. Returns
> + * true if the provided clock is a clkctrl type clock and it is in standby,
> + * false otherwise.
> + */
> +u32 ti_clk_is_in_standby(struct clk *clk)
> +{
> +       struct clk_hw *hw;
> +       struct clk_hw_omap *hwclk;
> +       u32 val;
> +
> +       hw = __clk_get_hw(clk);
> +
> +       if (!omap2_clk_is_hw_omap(hw))
> +               return false;
> +
> +       hwclk = to_clk_hw_omap(hw);
> +
> +       val = ti_clk_ll_ops->clk_readl(&hwclk->enable_reg);
> +
> +       if (val & OMAP4_STBYST_MASK)
> +               return true;
> +
> +       return false;

This is returning true and false for a function that is returning u32...
Why? Maybe just

	return val & OMAP4_STBYST_MASK;

and then it will be a u32 for the bit if it's set or 0 if it's not set?
Otherwise, change the return type to bool instead of u32?

> +}
> +EXPORT_SYMBOL_GPL(ti_clk_is_in_standby);

Re: [PATCHv3 00/10] clk: ti: remoteproc / iommu support patches

[Stephen Boyd]

Quoting Tero Kristo (2019-10-24 05:28:23)
> On 10/10/2019 18:32, Tero Kristo wrote:
> > On 10/10/2019 17:35, Tony Lindgren wrote:
> >> * Tero Kristo <t-kristo@ti.com> [191010 08:34]:
> >>> Stephen, any comments on this one or shall I just craft a 
> >>> pull-request for
> >>> this and rest of the TI clock driver changes towards 5.5? There seems 
> >>> to be
> >>> a pile of them coming this time over...
> >>
> >> Sounds like we need an immutable branch for the clkctrl related
> >> changes against v5.4-rc1 that I can also merge into omap-for-v5.5/prm
> >> branch in addition to the immutable prm reset driver branch.
> >>
> >> Otherwise I can't apply any of the consumer device related dts
> >> changes into that branch AFAIK.
> > 
> > Well, the sgx patch you can probably merge, as it will fail silently and 
> > only cause issues if you actually try to enable the device.
> > 
> > However, yes I agree, we should probably setup an immutable branch here.
> 
> Queued this series towards 5.5, thanks.
> 

One minor comment. Otherwise looks fine. Thanks.

Re: [PATCHv3 03/10] clk: ti: clkctrl: add new exported API for checking standby info

[Tero Kristo]

On 28/10/2019 16:40, Stephen Boyd wrote:
> Quoting Tero Kristo (2019-09-12 06:26:06)
>> diff --git a/drivers/clk/ti/clkctrl.c b/drivers/clk/ti/clkctrl.c
>> index d904a9a7626a..e3e0a66a6ce2 100644
>> --- a/drivers/clk/ti/clkctrl.c
>> +++ b/drivers/clk/ti/clkctrl.c
>> @@ -647,3 +650,33 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node)
>>   }
>>   CLK_OF_DECLARE(ti_omap4_clkctrl_clock, "ti,clkctrl",
>>                 _ti_omap4_clkctrl_setup);
>> +
>> +/**
>> + * ti_clk_is_in_standby - Check if clkctrl clock is in standby or not
>> + * @clk: clock to check standby status for
>> + *
>> + * Finds whether the provided clock is in standby mode or not. Returns
>> + * true if the provided clock is a clkctrl type clock and it is in standby,
>> + * false otherwise.
>> + */
>> +u32 ti_clk_is_in_standby(struct clk *clk)
>> +{
>> +       struct clk_hw *hw;
>> +       struct clk_hw_omap *hwclk;
>> +       u32 val;
>> +
>> +       hw = __clk_get_hw(clk);
>> +
>> +       if (!omap2_clk_is_hw_omap(hw))
>> +               return false;
>> +
>> +       hwclk = to_clk_hw_omap(hw);
>> +
>> +       val = ti_clk_ll_ops->clk_readl(&hwclk->enable_reg);
>> +
>> +       if (val & OMAP4_STBYST_MASK)
>> +               return true;
>> +
>> +       return false;
> 
> This is returning true and false for a function that is returning u32...
> Why? Maybe just
> 
> 	return val & OMAP4_STBYST_MASK;
> 
> and then it will be a u32 for the bit if it's set or 0 if it's not set?
> Otherwise, change the return type to bool instead of u32?
> 
>> +}
>> +EXPORT_SYMBOL_GPL(ti_clk_is_in_standby);

Right, let me fix that by converting the return type to bool.

-Tero
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Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

[PATCHv4 03/12] clk: ti: clkctrl: add new exported API for checking standby info

[Tero Kristo]

Standby status is provided for certain clkctrl clocks to see if the
given module has entered standby or not. This is mostly needed by
remoteproc code to see if the remoteproc has entered standby and the clock
can be turned off safely.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
v4: changed the return type to bool from u32.

 drivers/clk/ti/clkctrl.c | 33 +++++++++++++++++++++++++++++++++
 include/linux/clk/ti.h   |  1 +
 2 files changed, 34 insertions(+)

diff --git a/drivers/clk/ti/clkctrl.c b/drivers/clk/ti/clkctrl.c
index d904a9a7626a..e3e0a66a6ce2 100644
--- a/drivers/clk/ti/clkctrl.c
+++ b/drivers/clk/ti/clkctrl.c
@@ -34,6 +34,9 @@
 #define OMAP4_IDLEST_MASK		(0x3 << 16)
 #define OMAP4_IDLEST_SHIFT		16
 
+#define OMAP4_STBYST_MASK		BIT(18)
+#define OMAP4_STBYST_SHIFT		18
+
 #define CLKCTRL_IDLEST_FUNCTIONAL	0x0
 #define CLKCTRL_IDLEST_INTERFACE_IDLE	0x2
 #define CLKCTRL_IDLEST_DISABLED		0x3
@@ -647,3 +650,33 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node)
 }
 CLK_OF_DECLARE(ti_omap4_clkctrl_clock, "ti,clkctrl",
 	       _ti_omap4_clkctrl_setup);
+
+/**
+ * ti_clk_is_in_standby - Check if clkctrl clock is in standby or not
+ * @clk: clock to check standby status for
+ *
+ * Finds whether the provided clock is in standby mode or not. Returns
+ * true if the provided clock is a clkctrl type clock and it is in standby,
+ * false otherwise.
+ */
+bool ti_clk_is_in_standby(struct clk *clk)
+{
+	struct clk_hw *hw;
+	struct clk_hw_omap *hwclk;
+	u32 val;
+
+	hw = __clk_get_hw(clk);
+
+	if (!omap2_clk_is_hw_omap(hw))
+		return false;
+
+	hwclk = to_clk_hw_omap(hw);
+
+	val = ti_clk_ll_ops->clk_readl(&hwclk->enable_reg);
+
+	if (val & OMAP4_STBYST_MASK)
+		return true;
+
+	return false;
+}
+EXPORT_SYMBOL_GPL(ti_clk_is_in_standby);
diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
index bb2c5af9082a..3fb777f7103a 100644
--- a/include/linux/clk/ti.h
+++ b/include/linux/clk/ti.h
@@ -298,6 +298,7 @@ struct ti_clk_features {
 
 void ti_clk_setup_features(struct ti_clk_features *features);
 const struct ti_clk_features *ti_clk_get_features(void);
+bool ti_clk_is_in_standby(struct clk *clk);
 int omap3_noncore_dpll_save_context(struct clk_hw *hw);
 void omap3_noncore_dpll_restore_context(struct clk_hw *hw);
 
-- 
2.17.1

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