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From: Grygorii Strashko <grygorii.strashko@ti.com>
To: Michael Turquette <mturquette@baylibre.com>,
	Tero Kristo <t-kristo@ti.com>, Tony Lindgren <tony@atomide.com>
Cc: <linux-omap@vger.kernel.org>, <linux-clk@vger.kernel.org>,
	Grygorii Strashko <grygorii.strashko@ti.com>
Subject: [PATCH] clk: ti: dra7: fix parent for gmac_clkctrl
Date: Sat, 9 Nov 2019 16:20:17 +0200
Message-ID: <20191109142017.10851-1-grygorii.strashko@ti.com> (raw)

The parent clk for gmac clk ctrl has to be gmac_main_clk (125MHz) instead
of dpll_gmac_ck (1GHz). This is caused incorrect CPSW MDIO operation.
Hence, fix it.

Fixes: commit dffa9051d546 ('clk: ti: dra7: add new clkctrl data')
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
---
 drivers/clk/ti/clk-7xx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c
index 9dd6185a4b4e..66e4b2b9ec60 100644
--- a/drivers/clk/ti/clk-7xx.c
+++ b/drivers/clk/ti/clk-7xx.c
@@ -405,7 +405,7 @@ static const struct omap_clkctrl_bit_data dra7_gmac_bit_data[] __initconst = {
 };
 
 static const struct omap_clkctrl_reg_data dra7_gmac_clkctrl_regs[] __initconst = {
-	{ DRA7_GMAC_GMAC_CLKCTRL, dra7_gmac_bit_data, CLKF_SW_SUP, "dpll_gmac_ck" },
+	{ DRA7_GMAC_GMAC_CLKCTRL, dra7_gmac_bit_data, CLKF_SW_SUP, "gmac_main_clk" },
 	{ 0 },
 };
 
-- 
2.17.1


             reply index

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-09 14:20 Grygorii Strashko [this message]
2019-11-11 17:12 ` Tony Lindgren
2019-11-13 10:02   ` Grygorii Strashko
2019-11-13 15:23     ` Tony Lindgren
2019-11-13 15:35       ` Grygorii Strashko
2019-11-13 15:40         ` Tony Lindgren

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