From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B146DC17440 for ; Tue, 12 Nov 2019 14:25:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 88614222BD for ; Tue, 12 Nov 2019 14:25:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="Sgvj1b5K" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727703AbfKLOZN (ORCPT ); Tue, 12 Nov 2019 09:25:13 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:38692 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727661AbfKLOZM (ORCPT ); Tue, 12 Nov 2019 09:25:12 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id xACEP6DI098167; Tue, 12 Nov 2019 08:25:06 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1573568706; bh=JbeuG6x+HZ6/ASKy0zgpiATKRBUjPk9l7qqUTTj/NzQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Sgvj1b5KT+2deYZ/Lq1EZoG7Og+AhEPV/tsDp7aah2JSo+epCnJyQ3ZNHagJI6hWh Eybqpbtpu8H3anBQ9hPgJceD3xh+uojADWH5Qk/EPtCPHIfHnBr3tHJW3Lz0E72Mym KCN2TuzBkaGa/oyoN0CBjAoipri2FzDgM9bwHs8c= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id xACEP6o8030971; Tue, 12 Nov 2019 08:25:06 -0600 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 12 Nov 2019 08:24:48 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 12 Nov 2019 08:24:48 -0600 Received: from uda0869644b.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id xACEOrBp036029; Tue, 12 Nov 2019 08:25:05 -0600 From: Benoit Parrot To: Tony Lindgren , Tero Kristo CC: , , , , , Benoit Parrot Subject: [Patch v3 10/10] arm64: dts: k3-am654-base-board: Add CSI2 OV5640 camera Date: Tue, 12 Nov 2019 08:27:53 -0600 Message-ID: <20191112142753.22976-11-bparrot@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191112142753.22976-1-bparrot@ti.com> References: <20191112142753.22976-1-bparrot@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add support for the OV5640 CSI camera: - add the OV5640 nodes - add the CAL node linkage - enable CAL node Signed-off-by: Benoit Parrot --- .../arm64/boot/dts/ti/k3-am654-base-board.dts | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts index 1102b84f853d..73290c646334 100644 --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -53,6 +53,12 @@ gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>; }; }; + + clk_ov5640_fixed: clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; }; &wkup_pmx0 { @@ -184,6 +190,23 @@ pinctrl-names = "default"; pinctrl-0 = <&main_i2c1_pins_default>; clock-frequency = <400000>; + + ov5640@3c { + compatible = "ovti,ov5640"; + reg = <0x3c>; + + clocks = <&clk_ov5640_fixed>; + clock-names = "xclk"; + + port { + csi2_cam0: endpoint { + remote-endpoint = <&csi2_phy0>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; + }; &main_i2c2 { @@ -280,3 +303,16 @@ &pcie1_ep { status = "disabled"; }; + +&cal { + status = "okay"; +}; + +&csi2_0 { + csi2_phy0: endpoint@0 { + remote-endpoint = <&csi2_cam0>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; +}; + -- 2.17.1