From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A717AC43331 for ; Tue, 12 Nov 2019 14:25:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7DE75222C1 for ; Tue, 12 Nov 2019 14:25:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="wQ4II01/" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727618AbfKLOZ3 (ORCPT ); Tue, 12 Nov 2019 09:25:29 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:38684 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727646AbfKLOZI (ORCPT ); Tue, 12 Nov 2019 09:25:08 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id xACEP2Iq098129; Tue, 12 Nov 2019 08:25:02 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1573568702; bh=eJC9pkU6OOpCuYyC6VSXxendpXfUX3Fg0DEgqQA1b0M=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=wQ4II01/NbsGlSeMz7K2F2mHLoqMoxNKkriUlVPGaqcogpOHfrxINnFQ7BXhUN7Qg TgbBNO+JJNQDExcN0Hh73pRl6+Wa5a+7y9GGpk/AwwL0yksjjChUBBu2SC/mhvpSKs A6a1R9MrhyOKI8jJWzD/cKRb9vbonR60otx4xXqo= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xACEP2Ek116118 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 12 Nov 2019 08:25:02 -0600 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 12 Nov 2019 08:24:44 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 12 Nov 2019 08:24:44 -0600 Received: from uda0869644b.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id xACEOrBl036029; Tue, 12 Nov 2019 08:25:01 -0600 From: Benoit Parrot To: Tony Lindgren , Tero Kristo CC: , , , , , Benoit Parrot Subject: [Patch v3 06/10] arm: dts: dra72-evm-common: Add entries for the CSI2 cameras Date: Tue, 12 Nov 2019 08:27:49 -0600 Message-ID: <20191112142753.22976-7-bparrot@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191112142753.22976-1-bparrot@ti.com> References: <20191112142753.22976-1-bparrot@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add device nodes for CSI2 camera board OV5640. Add the CAL port nodes with the necessary linkage to the ov5640 nodes. Signed-off-by: Benoit Parrot --- arch/arm/boot/dts/dra72-evm-common.dtsi | 35 +++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi index 8641a3d7d8ad..608c7676c293 100644 --- a/arch/arm/boot/dts/dra72-evm-common.dtsi +++ b/arch/arm/boot/dts/dra72-evm-common.dtsi @@ -187,6 +187,12 @@ gpio = <&gpio5 8 GPIO_ACTIVE_HIGH>; enable-active-high; }; + + clk_ov5640_fixed: clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; }; &dra7_pmx_core { @@ -269,6 +275,23 @@ line-name = "vin6_sel_s0"; }; }; + + ov5640@3c { + compatible = "ovti,ov5640"; + reg = <0x3c>; + + clocks = <&clk_ov5640_fixed>; + clock-names = "xclk"; + + port { + csi2_cam0: endpoint { + remote-endpoint = <&csi2_phy0>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; + }; &uart1 { @@ -580,3 +603,15 @@ &pcie1_rc { status = "okay"; }; + +&cal { + status = "okay"; +}; + +&csi2_0 { + csi2_phy0: endpoint@0 { + remote-endpoint = <&csi2_cam0>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; +}; -- 2.17.1