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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Stephen Boyd <sboyd@kernel.org>
Cc: mturquette@baylibre.com, robh+dt@kernel.org,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	haitao.suo@bitmain.com, darren.tsao@bitmain.com,
	fisher.cheng@bitmain.com, alec.lin@bitmain.com
Subject: Re: [PATCH v6 0/7] Add Bitmain BM1880 clock driver
Date: Thu, 14 Nov 2019 11:39:37 +0530	[thread overview]
Message-ID: <20191114060937.GD8459@mani> (raw)
In-Reply-To: <20191114055054.C280F206DA@mail.kernel.org>

On Wed, Nov 13, 2019 at 09:50:53PM -0800, Stephen Boyd wrote:
> Quoting Manivannan Sadhasivam (2019-11-13 21:34:04)
> > On Wed, Nov 13, 2019 at 02:21:15PM -0800, Stephen Boyd wrote:
> > > Quoting Manivannan Sadhasivam (2019-10-26 04:02:46)
> > > > Hello,
> > > > 
> > > > This patchset adds common clock driver for Bitmain BM1880 SoC clock
> > > > controller. The clock controller consists of gate, divider, mux
> > > > and pll clocks with different compositions. Hence, the driver uses
> > > > composite clock structure in place where multiple clocking units are
> > > > combined together.
> > > > 
> > > > This patchset also removes UART fixed clock and sources clocks from clock
> > > > controller for Sophon Edge board where the driver has been validated.
> > > > 
> > > 
> > > Are you waiting for review here? I see some kbuild reports so I assumed
> > > you would fix and resend.
> > 
> > I'll fix it but I was expecting some review from you so that I can send the
> > next revision incorporating all comments.
> > 
> 
> Ok. I'm glad I broke the silence then.
> 
> Can you please resend without any dts changes? Those don't go through
> clk tree. 

I'm the platform maintainer, so I'll take the dts changes via ARM SoC tree.

> I think otherwise the patches look OK, although I was hoping
> you could register clks by using the new way of specifying parents. Is
> that possible?
> 

Eventhough I'd like to do, my time is very constrained these days. So please
consider merging it as it is and as I promised, I'll switch to the new way of
specifying parents soon.

Thanks,
Mani


      reply	other threads:[~2019-11-14  6:09 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-26 11:02 [PATCH v6 0/7] Add Bitmain BM1880 clock driver Manivannan Sadhasivam
2019-10-26 11:02 ` [PATCH v6 1/7] clk: Zero init clk_init_data in helpers Manivannan Sadhasivam
2019-10-26 11:02 ` [PATCH v6 2/7] clk: Add clk_hw_unregister_composite helper function definition Manivannan Sadhasivam
2019-10-26 11:02 ` [PATCH v6 3/7] dt-bindings: clock: Add devicetree binding for BM1880 SoC Manivannan Sadhasivam
2019-10-26 11:02 ` [PATCH v6 4/7] arm64: dts: bitmain: Add clock controller support " Manivannan Sadhasivam
2019-10-26 11:02 ` [PATCH v6 5/7] arm64: dts: bitmain: Source common clock for UART controllers Manivannan Sadhasivam
2019-10-26 11:02 ` [PATCH v6 6/7] clk: Add common clock driver for BM1880 SoC Manivannan Sadhasivam
2019-10-29  9:01   ` kbuild test robot
2019-10-26 11:02 ` [PATCH v6 7/7] MAINTAINERS: Add entry for BM1880 SoC clock driver Manivannan Sadhasivam
2019-11-13 22:21 ` [PATCH v6 0/7] Add Bitmain BM1880 " Stephen Boyd
2019-11-14  5:34   ` Manivannan Sadhasivam
2019-11-14  5:50     ` Stephen Boyd
2019-11-14  6:09       ` Manivannan Sadhasivam [this message]

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