* [PATCH] clk: imx: clk-composite-8m: add lock to gate/mux
@ 2019-11-01 10:16 Peng Fan
2019-11-01 10:42 ` Abel Vesa
2019-12-02 8:19 ` Shawn Guo
0 siblings, 2 replies; 4+ messages in thread
From: Peng Fan @ 2019-11-01 10:16 UTC (permalink / raw)
To: sboyd, shawnguo, s.hauer, festevam, Abel Vesa
Cc: kernel, dl-linux-imx, Anson Huang, Jacky Bai, linux-clk,
linux-arm-kernel, linux-kernel, Leonard Crestez, Peng Fan
From: Peng Fan <peng.fan@nxp.com>
There is a lock to diviver in the composite driver, but that's not
enought. lock to gate/mux are also needed to provide exclusive access
to the register.
Fixes: d3ff9728134e ("clk: imx: Add imx composite clock")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
drivers/clk/imx/clk-composite-8m.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c
index e0f25983e80f..20f7c91c03d2 100644
--- a/drivers/clk/imx/clk-composite-8m.c
+++ b/drivers/clk/imx/clk-composite-8m.c
@@ -142,6 +142,7 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char *name,
mux->reg = reg;
mux->shift = PCG_PCS_SHIFT;
mux->mask = PCG_PCS_MASK;
+ mux->lock = &imx_ccm_lock;
div = kzalloc(sizeof(*div), GFP_KERNEL);
if (!div)
@@ -161,6 +162,7 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char *name,
gate_hw = &gate->hw;
gate->reg = reg;
gate->bit_idx = PCG_CGC_SHIFT;
+ gate->lock = &imx_ccm_lock;
hw = clk_hw_register_composite(NULL, name, parent_names, num_parents,
mux_hw, &clk_mux_ops, div_hw,
--
2.16.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] clk: imx: clk-composite-8m: add lock to gate/mux
2019-11-01 10:16 [PATCH] clk: imx: clk-composite-8m: add lock to gate/mux Peng Fan
@ 2019-11-01 10:42 ` Abel Vesa
2019-12-02 8:19 ` Shawn Guo
1 sibling, 0 replies; 4+ messages in thread
From: Abel Vesa @ 2019-11-01 10:42 UTC (permalink / raw)
To: Peng Fan
Cc: sboyd, shawnguo, s.hauer, festevam, kernel, dl-linux-imx,
Anson Huang, Jacky Bai, linux-clk, linux-arm-kernel,
linux-kernel, Leonard Crestez
On 19-11-01 10:16:19, Peng Fan wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> There is a lock to diviver in the composite driver, but that's not
> enought. lock to gate/mux are also needed to provide exclusive access
> to the register.
>
> Fixes: d3ff9728134e ("clk: imx: Add imx composite clock")
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Looks good to me.
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> ---
> drivers/clk/imx/clk-composite-8m.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c
> index e0f25983e80f..20f7c91c03d2 100644
> --- a/drivers/clk/imx/clk-composite-8m.c
> +++ b/drivers/clk/imx/clk-composite-8m.c
> @@ -142,6 +142,7 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char *name,
> mux->reg = reg;
> mux->shift = PCG_PCS_SHIFT;
> mux->mask = PCG_PCS_MASK;
> + mux->lock = &imx_ccm_lock;
>
> div = kzalloc(sizeof(*div), GFP_KERNEL);
> if (!div)
> @@ -161,6 +162,7 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char *name,
> gate_hw = &gate->hw;
> gate->reg = reg;
> gate->bit_idx = PCG_CGC_SHIFT;
> + gate->lock = &imx_ccm_lock;
>
> hw = clk_hw_register_composite(NULL, name, parent_names, num_parents,
> mux_hw, &clk_mux_ops, div_hw,
> --
> 2.16.4
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] clk: imx: clk-composite-8m: add lock to gate/mux
2019-11-01 10:16 [PATCH] clk: imx: clk-composite-8m: add lock to gate/mux Peng Fan
2019-11-01 10:42 ` Abel Vesa
@ 2019-12-02 8:19 ` Shawn Guo
[not found] ` <20191203090339.A36CA20661@mail.kernel.org>
1 sibling, 1 reply; 4+ messages in thread
From: Shawn Guo @ 2019-12-02 8:19 UTC (permalink / raw)
To: Peng Fan
Cc: sboyd, s.hauer, festevam, Abel Vesa, kernel, dl-linux-imx,
Anson Huang, Jacky Bai, linux-clk, linux-arm-kernel,
linux-kernel, Leonard Crestez
On Fri, Nov 01, 2019 at 10:16:19AM +0000, Peng Fan wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> There is a lock to diviver in the composite driver, but that's not
s/diviver/divider
> enought. lock to gate/mux are also needed to provide exclusive access
s/enought/enough
> to the register.
>
> Fixes: d3ff9728134e ("clk: imx: Add imx composite clock")
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Other than above typos,
Acked-by: Shawn Guo <shawnguo@kernel.org>
Stephen,
I assume you will take it a fix. Otherwise, please let me know.
Shawn
> ---
> drivers/clk/imx/clk-composite-8m.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c
> index e0f25983e80f..20f7c91c03d2 100644
> --- a/drivers/clk/imx/clk-composite-8m.c
> +++ b/drivers/clk/imx/clk-composite-8m.c
> @@ -142,6 +142,7 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char *name,
> mux->reg = reg;
> mux->shift = PCG_PCS_SHIFT;
> mux->mask = PCG_PCS_MASK;
> + mux->lock = &imx_ccm_lock;
>
> div = kzalloc(sizeof(*div), GFP_KERNEL);
> if (!div)
> @@ -161,6 +162,7 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char *name,
> gate_hw = &gate->hw;
> gate->reg = reg;
> gate->bit_idx = PCG_CGC_SHIFT;
> + gate->lock = &imx_ccm_lock;
>
> hw = clk_hw_register_composite(NULL, name, parent_names, num_parents,
> mux_hw, &clk_mux_ops, div_hw,
> --
> 2.16.4
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2019-12-04 1:56 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2019-11-01 10:16 [PATCH] clk: imx: clk-composite-8m: add lock to gate/mux Peng Fan
2019-11-01 10:42 ` Abel Vesa
2019-12-02 8:19 ` Shawn Guo
[not found] ` <20191203090339.A36CA20661@mail.kernel.org>
2019-12-04 1:56 ` Shawn Guo
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