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From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	Prashant Gaikwad <pgaikwad@nvidia.com>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Viresh Kumar <viresh.kumar@linaro.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Peter Geis <pgwipeout@gmail.com>,
	Nicolas Chauvet <kwizart@gmail.com>,
	Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v6 12/12] ARM: dts: tegra30: beaver: Add CPU Operating Performance Points
Date: Wed, 18 Dec 2019 23:21:42 +0300
Message-ID: <20191218202142.11717-13-digetx@gmail.com> (raw)
In-Reply-To: <20191218202142.11717-1-digetx@gmail.com>

Utilize common Tegra30 CPU OPP table. CPU DVFS is available now on beaver.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 arch/arm/boot/dts/tegra30-beaver.dts | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
index 6ebb3105af9e..86556622be25 100644
--- a/arch/arm/boot/dts/tegra30-beaver.dts
+++ b/arch/arm/boot/dts/tegra30-beaver.dts
@@ -2,6 +2,8 @@
 /dts-v1/;
 
 #include "tegra30.dtsi"
+#include "tegra30-cpu-opp.dtsi"
+#include "tegra30-cpu-opp-microvolt.dtsi"
 
 / {
 	model = "NVIDIA Tegra30 Beaver evaluation board";
@@ -2124,4 +2126,26 @@ sound {
 			 <&tegra_car TEGRA30_CLK_EXTERN1>;
 		clock-names = "pll_a", "pll_a_out0", "mclk";
 	};
+
+	cpus {
+		cpu0: cpu@0 {
+			cpu-supply = <&vddctrl_reg>;
+			operating-points-v2 = <&cpu0_opp_table>;
+		};
+
+		cpu@1 {
+			cpu-supply = <&vddctrl_reg>;
+			operating-points-v2 = <&cpu0_opp_table>;
+		};
+
+		cpu@2 {
+			cpu-supply = <&vddctrl_reg>;
+			operating-points-v2 = <&cpu0_opp_table>;
+		};
+
+		cpu@3 {
+			cpu-supply = <&vddctrl_reg>;
+			operating-points-v2 = <&cpu0_opp_table>;
+		};
+	};
 };
-- 
2.24.0


  parent reply index

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-18 20:21 [PATCH v6 00/12] NVIDIA Tegra20 CPUFreq driver major update Dmitry Osipenko
2019-12-18 20:21 ` [PATCH v6 01/12] clk: tegra: Add custom CCLK implementation Dmitry Osipenko
2019-12-18 20:21 ` [PATCH v6 02/12] clk: tegra: pll: Add pre/post rate-change hooks Dmitry Osipenko
2019-12-18 20:21 ` [PATCH v6 03/12] clk: tegra: cclk: Add helpers for handling PLLX rate changes Dmitry Osipenko
2019-12-18 20:21 ` [PATCH v6 04/12] clk: tegra20: Use custom CCLK implementation Dmitry Osipenko
2019-12-18 20:21 ` [PATCH v6 05/12] clk: tegra30: " Dmitry Osipenko
2019-12-18 20:21 ` [PATCH v6 06/12] ARM: tegra: Switch CPU to PLLP on resume from LP1 on Tegra30/114/124 Dmitry Osipenko
2019-12-18 20:21 ` [PATCH v6 07/12] ARM: tegra: Don't enable PLLX while resuming from LP1 on Tegra30 Dmitry Osipenko
2020-02-01 22:57   ` Marcel Ziswiler
2020-02-02  1:08     ` Dmitry Osipenko
2019-12-18 20:21 ` [PATCH v6 08/12] dt-bindings: cpufreq: Add binding for NVIDIA Tegra20/30 Dmitry Osipenko
2019-12-18 20:21 ` [PATCH v6 09/12] cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now) Dmitry Osipenko
2019-12-18 20:21 ` [PATCH v6 10/12] ARM: tegra: Create tegra20-cpufreq platform device on Tegra30 Dmitry Osipenko
2019-12-18 20:21 ` [PATCH v6 11/12] ARM: dts: tegra30: beaver: Set up voltage regulators for DVFS Dmitry Osipenko
2019-12-18 20:21 ` Dmitry Osipenko [this message]
2020-01-07 23:17 ` [PATCH v6 00/12] NVIDIA Tegra20 CPUFreq driver major update Dmitry Osipenko
2020-01-14 15:53 ` Peter De Schrijver
2020-01-14 20:36   ` Dmitry Osipenko

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