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From: Stephen Boyd <sboyd@kernel.org>
To: Elaine Zhang <zhangqing@rock-chips.com>, heiko@sntech.de
Cc: mturquette@baylibre.com, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	xxx@rock-chips.com, xf@rock-chips.com, huangtao@rock-chips.com,
	Elaine Zhang <zhangqing@rock-chips.com>
Subject: Re: [PATCH v4 4/5] clk: rockchip: add pll up and down when change pll freq
Date: Mon, 30 Dec 2019 11:06:55 -0800	[thread overview]
Message-ID: <20191230190656.869962053B@mail.kernel.org> (raw)
In-Reply-To: <20191204081859.19454-5-zhangqing@rock-chips.com>

Quoting Elaine Zhang (2019-12-04 00:18:58)
> set pll sequence:
>         ->set pll to slow mode or other plls
>         ->set pll down
>         ->set pll params
>         ->set pll up
>         ->wait pll lock status
>         ->set pll to normal mode
> 
> To slove the system error:

s/slove/solve/

> wait_pll_lock: timeout waiting for pll to lock
> pll_set_params: pll update unsucessful,
>                 trying to restore old params
> 
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

  reply	other threads:[~2019-12-30 19:06 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-04  8:18 [PATCH v4 0/5] clk: rockchip: Support for some new features Elaine Zhang
2019-12-04  8:18 ` [PATCH v4 1/5] clk: rockchip: Add supprot to limit input rate for fractional divider Elaine Zhang
2019-12-04  8:18 ` [PATCH v4 2/5] clk: rockchip: fix up the frac clk get rate error Elaine Zhang
2019-12-04  8:18 ` [PATCH v4 3/5] clk: rockchip: add a clock-type for muxes based in the pmugrf Elaine Zhang
2019-12-04  8:18 ` [PATCH v4 4/5] clk: rockchip: add pll up and down when change pll freq Elaine Zhang
2019-12-30 19:06   ` Stephen Boyd [this message]
2019-12-04  8:25 ` [PATCH v4 5/5] clk: rockchip: support pll setting by auto Elaine Zhang
2020-10-14  2:28 [PATCH v4 0/5] clk: rockchip: Support for some new features Elaine Zhang
2020-10-14  2:28 ` [PATCH v4 4/5] clk: rockchip: add pll up and down when change pll freq Elaine Zhang

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